hathach
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89475fcf26
|
add unique id for u5, also allow to build with OPT_OS_CUSTOM
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2023-11-02 19:32:25 +07:00 |
|
HiFiPhile
|
de02748504
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Update make
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2023-10-31 21:29:07 +01:00 |
|
HiFiPhile
|
bf2e54e3d3
|
Add STM32F4 OTG_FS pin to BSP.
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2023-10-31 20:46:55 +01:00 |
|
HiFiPhile
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86f00f6b49
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Fix STM32F7 OTG_HS GPIO alt mapping.
|
2023-10-31 20:45:06 +01:00 |
|
Ha Thach
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4c01c5a714
|
Merge pull request #2300 from hathach/add-u5a5
Add support for stm32u5a5 (highspeed with built-in femtoPHY)
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2023-10-31 13:27:54 +07:00 |
|
hathach
|
3e140756dc
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update stm32u5xx_hal_driver, fix build with old u575 board
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2023-10-31 12:08:45 +07:00 |
|
hathach
|
6ab7875aab
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uart working on u5a5
|
2023-10-31 11:39:20 +07:00 |
|
hathach
|
db3ff4b352
|
usb on u5a5 hs work well with correct VBVALEXTOEN/VBVALOVAL set
|
2023-10-31 11:26:31 +07:00 |
|
hathach
|
9f0223dccd
|
minor clean up
|
2023-10-31 10:58:15 +07:00 |
|
hathach
|
a4c542a7b4
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addd dwc2_info.py/md update stm32u5a5 board clock & power configure, able to get passed otg clock reset
|
2023-10-30 22:21:58 +07:00 |
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hathach
|
9cba9a753b
|
update s3 devkitm with max3421 pin following metro s3, check max3421 version to make sure it is valid
|
2023-10-27 17:40:53 +07:00 |
|
hathach
|
27a2c8cba4
|
adding nulceo stm32u5a5, fix clock configure issue
dwc2 core stuck at reset
|
2023-10-18 18:43:07 +07:00 |
|
hathach
|
5025e80c9e
|
adding u5a5 nucleo
|
2023-10-18 15:27:06 +07:00 |
|
hathach
|
a5a77af11e
|
add board.mk for u575 nucleo
|
2023-10-17 23:53:09 +07:00 |
|
hathach
|
22aefd6aba
|
add cmake support for u575 nucleo
|
2023-10-17 22:48:54 +07:00 |
|
Ha Thach
|
80ee307244
|
Merge branch 'master' into feat-stm32u575_nucleo
|
2023-10-17 22:31:33 +07:00 |
|
hathach
|
cfb683f481
|
tested with nrf52840 and esp32s2
|
2023-10-05 17:01:41 +07:00 |
|
hathach
|
67e34267a6
|
change tuh_max3421_spi_xfer_api() signature
tested working with sam d21 and d51, not tested with nrf52, seem not
working with esp32
|
2023-10-04 18:00:32 +07:00 |
|
hathach
|
f36e0b7b92
|
esp32 comment out uart, increase max3421 spi speed to 26mhz
|
2023-10-03 16:27:35 +07:00 |
|
hathach
|
8348631bf5
|
improve esp32 ci, build esp32 with -DDMAX3421_HOST=1 for max3421 testing
revert change in hcd.h
|
2023-09-28 16:15:31 +07:00 |
|
hathach
|
6b8933cfe8
|
fix build with new freertos host example
|
2023-09-28 12:55:59 +07:00 |
|
hathach
|
7dc1a66f91
|
esp32 cdc host with max3421 work well
|
2023-09-28 11:12:22 +07:00 |
|
hathach
|
10abece264
|
esp32 hid device work well
|
2023-09-28 10:06:10 +07:00 |
|
hathach
|
3a10b6a3d5
|
fix esp32 build
|
2023-09-27 18:09:19 +07:00 |
|
hathach
|
76c43a5bdc
|
Merge branch 'master' into add-max3421-esp32
|
2023-09-27 17:52:18 +07:00 |
|
Ha Thach
|
68c4009bba
|
Merge branch 'master' into add-in_isr-to-hcd_int_hanlder
|
2023-09-27 17:01:40 +07:00 |
|
hathach
|
58c49cea5b
|
remove sct_neopixel from lpc54 (due to warnings and not used)
|
2023-09-27 16:31:46 +07:00 |
|
hathach
|
0a4fb6963d
|
fix build with lpc54
|
2023-09-27 16:19:39 +07:00 |
|
hathach
|
3b0ffd0f48
|
change hcd_int_handler(rhport, in_isr) signature: add in_isr
change tuh_int_handler() to take in_isr as optional parameter (default =
true)
|
2023-09-27 15:51:03 +07:00 |
|
hathach
|
6dc64eaa28
|
max3421 communication work with esp32 up to enumeration, seems still have a bit of issue
|
2023-09-27 12:34:45 +07:00 |
|
hathach
|
2f6592de7f
|
update max3421 to have hcd_int_handler_ext()
|
2023-09-27 11:30:18 +07:00 |
|
hathach
|
f6ca86c3dd
|
tested cdc_msc_hid_freertos with samd51
add -Wno-error=format for espressif
wrap up cdc_msc_hid_freertos
|
2023-09-26 19:09:36 +07:00 |
|
hathach
|
a7c136c03f
|
adding host/cdc_msc_hid_freertos example
|
2023-09-25 16:53:11 +07:00 |
|
hathach
|
b73262be3a
|
minor indent
|
2023-09-19 18:38:47 +07:00 |
|
hathach
|
8cdcd0fa9d
|
fix build and add u5 to ci
|
2023-09-19 18:35:15 +07:00 |
|
hathach
|
71a2e8a36d
|
addding cmake support for u5
|
2023-09-19 17:59:38 +07:00 |
|
hathach
|
81cd995108
|
add default CFG_TUH_MAX3421 = 0, default spi speed for samd21/samd51 to 12Mhz
|
2023-09-18 22:15:31 +07:00 |
|
hathach
|
f55052b61f
|
enable max3421 host for feather nrf52840 with makefile
|
2023-09-11 16:44:06 +07:00 |
|
hathach
|
1eb0cb0c65
|
update readme to include max3421 support
|
2023-09-11 15:45:26 +07:00 |
|
hathach
|
ab9585401b
|
wrap up build cmake & make support for max3421, to enable the Host driver, 'MAX3421_HOST=1' must be added as part of make/cmake command
|
2023-09-11 11:35:51 +07:00 |
|
hathach
|
e32c1e08bd
|
both samd21/d51 works perfectly with max3421e
|
2023-09-09 16:50:16 +07:00 |
|
hathach
|
605ad73ec0
|
refactor max3421_init() for samd51 to be generic for sercom and eic
|
2023-09-09 13:04:36 +07:00 |
|
hathach
|
c074488f75
|
minor rename
|
2023-09-09 12:20:16 +07:00 |
|
hathach
|
1d68f2a328
|
metro m4 working with max3421e
|
2023-09-08 18:39:09 +07:00 |
|
hathach
|
bcc77a60e0
|
get spi working for metro m4 express
|
2023-09-08 17:40:00 +07:00 |
|
hathach
|
ed102a7795
|
Merge branch 'master' into add-max3421e-hcd
|
2023-09-07 21:42:46 +07:00 |
|
hathach
|
d3c08ecc3a
|
more ci fix
|
2023-09-07 17:20:07 +07:00 |
|
hathach
|
e8558458c4
|
fix ci
|
2023-09-07 17:09:25 +07:00 |
|
hathach
|
2dea4ce6a2
|
add cmake support for samd21.
update ci cmake
|
2023-09-07 16:58:40 +07:00 |
|
hathach
|
bb5d43e9c5
|
add samd51 to cmake
|
2023-09-07 15:31:43 +07:00 |
|