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fad44c03c874ad5b278e41ab842e2fb36134ad2a
Commit Graph

581 Commits

Author SHA1 Message Date
William D. Jones
fad44c03c8 dcd_msp430x5xx: Fix TOGGLE bit behavior, clear stall when endpoint 
opened due to reset potentially not resetting everything.
 2019-10-01 23:03:39 -04:00
William D. Jones
b623e3023e dcd_msp430x5xx: Implement receive_packet for all endpoints, correct 
some mistakes in transmit_packet.
 2019-09-29 03:58:30 -04:00
William D. Jones
549ad1d9b6 dcd_msp430x5xx: Fix missing mask when posting IN xfer events. 2019-09-29 03:02:59 -04:00
William D. Jones
838b431fac dcd_msp430x5xx: Implement transmit_packet for nonzero endpoints. Untested. 2019-09-29 02:43:05 -04:00
William D. Jones
2247f132ca Implement dcd_edpt_xfer for nonzero endpoints. 2019-09-29 02:22:09 -04:00
William D. Jones
ea0e799df6 dcd_msp430x5xx: Fix clear stall logic. 2019-09-29 02:17:59 -04:00
William D. Jones
529efcc0d2 dcd_msp430x5xx: Implement dcd_edpt_open. 2019-09-29 00:21:40 -04:00
William D. Jones
5d9f833915 dcd_msp430x5xx: Implement STALL logic for EP 0. 2019-09-28 02:09:03 -04:00
William D. Jones
63c94ff684 dcd_msp430x5xx: Improve EP0 IN handling (reuse short_packet field). 2019-09-28 01:51:05 -04:00
William D. Jones
030560792d dcd_msp430x5xx: Implement dcd_set_address. 2019-09-27 21:59:45 -04:00
William D. Jones
3ac43076da dcd_msp430x5xx: Implement EP0 IN xfers, clean up. 2019-09-27 21:22:19 -04:00
Nathan Conrad
c4483d244b Fix typo of CFG_TUD_ENDOINT0_SIZE. 2019-09-27 21:22:19 -04:00
William D. Jones
01b4115b0b dcd_msp430x5xx: Fix Setup packet delay by actually enabling 
corresponding interrupt.
 2019-09-24 04:06:34 -04:00
William D. Jones
550e8215f3 dcd_msp430x5xx: Setup packets are now received successfully (with delay). 2019-09-24 03:43:51 -04:00
William D. Jones
d2e4af5a7b msp430f5529: Change EP0 size to 8, implement interrupt logic up to bus 
reset detection.
 2019-09-24 02:41:11 -04:00
William D. Jones
950614a841 msp430f5529: Implement dcd_int_enable/disable. 2019-09-23 22:58:49 -04:00
William D. Jones
a6a79df9fb msp430f5529: Enable clocks/PLL for msp_exp430f5529lp and enable USB 
module in dcd_msp430x5xx; device does not enumerate.
 2019-09-23 18:53:31 -04:00
William D. Jones
907bc3df9b msp430f5529: Ensure cdc_msc demo compiles. 2019-09-23 17:48:18 -04:00
William D. Jones
6280e4e7cb msp430f5529: Add empty msp_exp430f5529lp BSP and DCD. 2019-09-14 18:02:17 -04:00
hathach
7f166d860d stm32f7 work with dcd synopsis 
close #124
 2019-09-11 22:48:07 +07:00
hathach
a3f1c269e9 added stm32f767nucleo board, board_test works 2019-09-11 18:02:27 +07:00
hathach
bf76a1e49e Merge pull request #136 from hathach/develop 
fix #132
 2019-09-11 11:16:47 +07:00
hathach
6c6a597465 fix #132 2019-09-11 10:47:07 +07:00
hathach
678ba586df Merge pull request #122 from cr1901/synopsys 
Synopsys Refactor
 2019-09-11 10:37:49 +07:00
Nathan Conrad
4f6bedeac9 Rename the STM32 MCU options. 2019-09-10 12:57:43 -04:00
Nathan Conrad
23d39f2b15 Remove OPT_MCU_STM for L and G series. 2019-09-10 12:13:36 -04:00
Nathan Conrad
65e72de7ce Move interrupt handler into device driver, and rename the OPT_MCU_STM32 constants. 2019-09-10 09:35:52 -04:00
Nathan Conrad
49c58be4ce Fix silly typo in the F3xx support. 2019-09-10 01:31:14 -04:00
Nathan Conrad
bc2a65b20b A few bug fixes, remove the unstested device notices, note supported boards in READMEs, and implement PMA 
access stride (used on MCU's with 512 byte USB buffers).
 2019-09-10 01:03:24 -04:00
Nathan Conrad
f7b0aeec52 Start clock on F0 and F0, and handle USB interrupts. 2019-09-09 19:20:26 -04:00
Nathan Conrad
d1976a30b3 Update F3 BSP and create F070RB BSP. Both are untested (but compile). 2019-09-09 16:14:38 -04:00
Nathan Conrad
5ec59c2a30 Add STM32 FSDEV driver. 2019-09-09 14:55:39 -04:00
Nathan Conrad
75a3f791e3 Remove some type conversion warnings (using GCC pedantic warnings) 2019-09-09 13:35:41 -04:00
Nathan Conrad
4517d504b8 Fix typo of ENDOINT 2019-09-09 13:34:30 -04:00
Nathan Conrad
b4c8a09f20 Remove STM32 F3 port. 2019-09-09 13:29:26 -04:00
Nathan Conrad
96bead4b2a Add dummy arguments to GET_NTH_ARG to make GCC happy (removes pedantic warnings) 2019-09-09 13:24:08 -04:00
William D. Jones
1385d7c494 stm32: Refactor so F4 and H7 use a single Synopsys IP source file. 2019-09-09 10:48:14 -04:00
William D. Jones
82cd4b5350 dcd_stm32f4: Merge relevant changes from dcd_stm32h7. 2019-09-09 10:27:46 -04:00
William D. Jones
3efc81b285 dcd_stm32h7: Merge relevant changes from dcd_stm32f4. USB2 -> USB works as alias. 2019-09-09 10:14:20 -04:00
hathach
e123cad7bb enhance dcd stm32f4 to support max 4 or 6 endpoints on 407 or 412 2019-09-08 23:10:51 +07:00
hathach
4663f9084d ported board stm32f412g discovery 
- added soft connect for enable pull up register dcd stm32f4
 2019-09-08 21:57:02 +07:00
hathach
56f1ccd68a fix #97 2019-09-05 21:59:19 +07:00
hathach
143a138028 Merge pull request #116 from hathach/develop 
Board update
 2019-09-05 16:18:34 +07:00
hathach
a90e2aa2ce 55s69 device work with usb0 2019-09-05 16:12:13 +07:00
hathach
7350e9c25c Merge pull request #114 from cr1901/stm32h7 
STM32H7 Support
 2019-09-05 15:29:13 +07:00
William D. Jones
8f8ca77a91 stm32h7: Mark USB FIFOs as volatile, otherwise optimizations will remove 
reads/writes to the FIFOs.
 2019-09-04 01:06:07 -04:00
William D. Jones
910fd867c7 stm32h7: Fix indentation error where OUT XFER interrupt wasn't handled 
in the correct scope.
 2019-09-03 01:37:44 -04:00
William D. Jones
1a3dc9cba1 stm32h7: USB_OTG_FS -> USB2_OTG_FS. 2019-09-03 01:28:41 -04:00
William D. Jones
f703a74daa stm32h7: Implement STALL logic for endpoints. 2019-09-03 01:28:41 -04:00
William D. Jones
28b131ea94 stm32h7: Implement dcd_edpt_open. cdc_msc_hid demo functional. 2019-09-03 00:37:50 -04:00