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3309 Commits

Author SHA1 Message Date
Ha Thach
a91b720c2e Merge pull request #2291 from hathach/minor-update-max3421 
minor update for max3421
 2023-10-30 11:10:03 +07:00
hathach
9cba9a753b update s3 devkitm with max3421 pin following metro s3, check max3421 version to make sure it is valid 2023-10-27 17:40:53 +07:00
HiFiPhile
2d802e03e9 Update audio_4_channel_mic example for HS device. 2023-10-24 22:14:24 +02:00
PanRe
a2390802f8 Merge pull request #2282 from HiFiPhile/uac_interl 
UAC IN transfer improvements
 2023-10-19 19:49:19 +02:00
Mengsk
d3fa3cdf48 Adjsut blackout time. 2023-10-18 17:05:35 +02:00
hathach
27a2c8cba4 adding nulceo stm32u5a5, fix clock configure issue 
dwc2 core stuck at reset
 2023-10-18 18:43:07 +07:00
Ha Thach
dd588222c7 Merge pull request #2265 from bencowperthwaite/master 
STM32U5 HS Support
 2023-10-18 15:25:57 +07:00
HiFiPhile
ade8a19aef Put sw_buf in USB section only if necessary. 2023-10-17 21:21:52 +02:00
HiFiPhile
e9d894fe66 Fix compile. 2023-10-17 21:03:29 +02:00
HiFiPhile
d83a210788 Add blackout time. 2023-10-17 15:18:05 +02:00
HiFiPhile
0a1d6cf4d0 Read sample rate directly from control transfer to eliminate callback. 2023-10-17 13:06:55 +02:00
HiFiPhile
656e1e416a Add flow control for IN transfer. 2023-10-17 09:46:01 +02:00
HiFiPhile
8b2cb63da8 Fix naming nBytesPerSample. 2023-10-10 18:22:20 +02:00
HiFiPhile
b5c839f739 Merge branch 'master' of https://github.com/hathach/tinyusb into uac_interl 2023-10-10 15:02:25 +02:00
denis.krasutski
ce627f4318 feat(ch32f20x): add support of ch32f20x 2023-10-06 13:04:54 +03:00
hathach
67e34267a6 change tuh_max3421_spi_xfer_api() signature 
tested working with sam d21 and d51, not tested with nrf52, seem not
working with esp32
 2023-10-04 18:00:32 +07:00
hathach
8348631bf5 improve esp32 ci, build esp32 with -DDMAX3421_HOST=1 for max3421 testing 
revert change in hcd.h
 2023-09-28 16:15:31 +07:00
hathach
6b8933cfe8 fix build with new freertos host example 2023-09-28 12:55:59 +07:00
hathach
277852afc1 fix esp32 msc example 2023-09-28 10:56:38 +07:00
hathach
76c43a5bdc Merge branch 'master' into add-max3421-esp32 2023-09-27 17:52:18 +07:00
hathach
3b0ffd0f48 change hcd_int_handler(rhport, in_isr) signature: add in_isr 
change tuh_int_handler() to take in_isr as optional parameter (default =
true)
 2023-09-27 15:51:03 +07:00
hathach
2f6592de7f update max3421 to have hcd_int_handler_ext() 2023-09-27 11:30:18 +07:00
bac
1168e4e163 Added support for USB2 HS peripheral (with integrated HS PHY) on STM32U59x chips 2023-09-26 15:27:17 +01:00
hathach
f6ca86c3dd tested cdc_msc_hid_freertos with samd51 
add -Wno-error=format for espressif
wrap up cdc_msc_hid_freertos
 2023-09-26 19:09:36 +07:00
hathach
a7c136c03f adding host/cdc_msc_hid_freertos example 2023-09-25 16:53:11 +07:00
HiFiPhile
6be7f354c2 Fix cast-align. 2023-09-19 16:35:05 +02:00
HiFiPhile
9d0251f7a6 Fix UAC interleaved copy. 2023-09-19 15:42:52 +02:00
hathach
81cd995108 add default CFG_TUH_MAX3421 = 0, default spi speed for samd21/samd51 to 12Mhz 2023-09-18 22:15:31 +07:00
Ha Thach
e9ba93315c Merge pull request #2245 from arduino/fix_msd_extraneus_bytes_on_reading 
Fix msd extraneus bytes on reading
 2023-09-12 12:53:52 +07:00
hathach
c074488f75 minor rename 2023-09-09 12:20:16 +07:00
maidnl
228acbeac2 wait_pipe_fifo_empty() now returns bool (as expected using TU_ASSERT macro) 2023-09-08 15:48:05 +02:00
maidnl
7ce4cfa638 renesas: added wait function for IN transaction 
This fixes a problem found on MSD class where data read from from disks were sometimes partially overwritten by the status MSD message ("USBS...").
The function introduced wait for the hw fifo pipe to be empty, that prevent that new writing in the fife overwrite data which are not yet be transmitted by hw.
 2023-09-08 10:49:05 +02:00
hathach
21ab40bab2 - wrap up hcd max3421, work well with nrf52840 
- also add usbh_defer_func()
 2023-09-07 12:38:18 +07:00
hathach
1b9108ea0d minor debug clean up 2023-09-06 17:11:35 +07:00
hathach
ed0a233d48 vastly improve attach/detach device, still have issue where thing is still hanged occasionally. 2023-08-31 21:28:27 +07:00
hathach
3b7d5aa042 improve connection & disconnection detection. But there is still issue when CONDETIRQ occurs but we are disabled interrupt (for osal queue access). 2023-08-31 16:52:09 +07:00
hathach
41493426b3 use ep buf to keep setup packet, work well with hid device 2023-08-30 16:21:43 +07:00
hathach
1ab488eb06 call xfer_complete_isr() when result is not successful (stalled or failed) 2023-08-30 16:04:18 +07:00
Alexander Mueller
9665843635 Fix the weak dcd_edpt0_status_complete for Keil Compiler 
The Keil compiler seems to have different semantics and the defined function was never called.

The same is probably true for the other weak functions. I can change those too.
 2023-08-29 18:16:50 +02:00
hathach
2a814a99af - hcd_setup_send() also check for busy flag 
- xact_inout() to support send setup
 2023-08-29 20:27:37 +07:00
hathach
3740a3287a - correct tuh_max3421e_int_api() for nrf52 
- hcd_int_disable/enable is software only to reduce interrupt lag
 2023-08-29 18:22:21 +07:00
hathach
b31924e13e - add xfer_complete_isr() 
- merge addr0 ep to pool
- add control status to xact in/out
- use atomic flag busy to ensure only 1 transfer is active at any time
- execute pending transfer after one is complete (or clear busy flag)
- change rtt mode to block if full
 2023-08-28 12:41:44 +07:00
hathach
502b1bdda6 more update to transaction 2023-08-27 23:45:34 +07:00
hathach
cd7464a884 try next endpoint when received NAK 2023-08-25 17:37:09 +07:00
hathach
ac00b91472 add xact_out(), xact_in() to manage transfer 2023-08-25 17:26:57 +07:00
hathach
ecf2f91042 use endpoint pool for more flexible multiple devices support 2023-08-25 16:36:28 +07:00
hathach
09ceaa6cf3 add osal mutex for spi 2023-08-25 13:18:47 +07:00
hathach
f5ebc1700f add spi lock with interrupt enable/disable 2023-08-25 12:12:44 +07:00
hathach
e6cf125e53 save data toggle, always retry NAK. work with msc device 2023-08-24 16:46:20 +07:00
hathach
344932d27e add tuh_max3421e_int_api(), retry control if received NAK 2023-08-24 16:27:47 +07:00