hathach
86b4608365
update dfifo allocation scheme to use top pointer, update document and explanation for EPInfo address and GDFIFO.
...
some function rename
update h743 linker to use SRAM1 since USB DMA cannot access DTCM ram
update xmc4500 to use uuid for testing
2024-09-24 17:38:31 +07:00
Shawn Hoffman
616532892d
make all python files executable and standardize interpreter
2024-09-17 12:17:12 -07:00
HiFiPhile
7867464694
Merge branch 'master' into dwc2_dma
2024-09-08 17:15:28 +02:00
hathach
0bb7b992d8
dwc2: for esp32 force disconnect/connect using USB_WRAP otg pad override (DM=DP=0) in addition to dwc2's dctrl
2024-09-04 20:56:04 +07:00
hathach
4ce1cce40a
simplify dwc2 test mode
...
- all dwc2 ip seems to support test mode in both fs/hs -> remove TUP_USBIP_DWC2_TEST_MODE
- remove dcd_check_test_mode_support(), all should be supported
- move enum tusb_feature_test_mode_t to tusb_types.h
2024-07-12 20:17:14 +07:00
HiFiPhile
6d4e2f6c16
Fix GenID 3.10 issue on STM32L4.
2024-06-27 22:02:18 +02:00
HiFiPhile
eefca229b6
Merge branch 'master' of https://github.com/hathach/tinyusb into dwc2_dma
2024-06-27 20:49:40 +02:00
Andrew Leech
0d79da37e7
synopsys/dwc2_esp32: Add header for vTaskDelay.
2024-06-20 15:18:41 +10:00
hathach
927015baae
wch usbfs/usbhs need to specify which driver to use. for v307 default to highspeed
2024-05-24 11:38:44 +07:00
HiFiPhile
ad734e658c
Remove dead code.
2024-05-13 22:27:33 +02:00
HiFiPhile
e250b82377
Adjust logic.
2024-05-13 22:26:19 +02:00
HiFiPhile
0fce7d1f54
Merge branch 'master' into test-mode-support
2024-05-13 21:08:11 +02:00
HiFiPhile
02ec486610
Fix spurious EP0 completion.
2024-05-05 22:01:09 +02:00
HiFiPhile
8765568282
Change DMA condition.
2024-04-25 23:26:19 +02:00
HiFiPhile
298f7f2d81
Fix DMA FIFO reservation.
2024-04-25 23:23:43 +02:00
HiFiPhile
394dc0686a
Check IN ep count limit.
2024-04-25 22:44:48 +02:00
HiFiPhile
cde722385c
dwc2: add dma support.
2024-04-25 22:44:48 +02:00
HiFiPhile
c2f836279e
Disable EPs correctly to clear incomplete transfer.
2024-04-25 11:51:06 +07:00
hathach
0f3d6c61b5
port clang stm32: f1, f2, f3
2024-04-23 12:04:08 +07:00
hathach
3442a87d5b
- clang h743 build and run cdc_msc ok
...
- switch unit test back to gcc, since path to clang conflict on local setup (x86 and arm)
2024-04-19 23:16:57 +07:00
hathach
e1c3b5aeab
minor update to sof
2024-04-16 10:57:54 +07:00
hathach
79cbe93fcf
separate flush tx/rx fifo
2024-04-11 11:02:54 +07:00
HiFiPhile
03cfe90f3e
flush fifo in dcd_edpt_close_all()
2024-04-10 22:21:53 +02:00
hathach
724ef1af8d
set txfifo empty level to complete and change back fifo tx to normal size
2024-04-10 09:58:43 +07:00
hathach
2bce68a065
Merge branch 'master' into dwc2-interrupts
2024-04-09 22:04:43 +07:00
HiFiPhile
e160366a1e
dwc2: remove fifo free code.
2024-04-05 19:12:28 +02:00
hathach
85420c61c7
minor clean up
2024-03-31 13:49:41 +07:00
HiFiPhile
8055bc88d8
Code refactor.
2024-03-30 10:36:29 +07:00
HiFiPhile
4116a962a6
Flush FIFO on bus reset.
2024-03-30 10:36:28 +07:00
HiFiPhile
cab1106416
dwc2: add endpoint allocation support.
2024-03-30 10:36:27 +07:00
Rocky04
d0373f4749
Opt-out for USB Test-Mode
2024-02-19 17:44:18 +00:00
Chris Desjardins
5ca9980060
Do not enable the Mode mismatch interrupt source, it is not cleared
...
If this interrupt ever hits it will result in an infinite interrupt
loop as it is never cleared.
2024-02-15 16:34:31 +01:00
HiFiPhile
d692d77834
Merge branch 'master' into src/portable/synopsys/dwc2/fix_sof_int_handling
2024-02-01 11:12:20 +01:00
Rocky04
78a1d4c482
Merge branch 'master' into test-mode-support
2024-01-15 16:27:22 +01:00
Rocky04
c3e96e667f
Change to control complete cb
2024-01-15 15:10:46 +00:00
Rocky04
1755bba509
Add DWC2 Test Mode SUpport
2024-01-15 12:47:13 +00:00
Alex Voinea
3bf6826451
Disable ULPI clock during sleep on stm32f7 when using internal phy
2024-01-10 10:27:21 +01:00
hathach
01f22a9e25
fix h7 running on fullspeed phy has issue with WFI if not disable ULPI clock
2023-11-22 22:50:10 +07:00
hathach
025ffa200c
add spec version to dwc2 info
2023-11-22 17:36:52 +07:00
HiFiPhile
8af470e06d
Fix CI
2023-11-19 16:19:11 +01:00
HiFiPhile
b5b34e73d6
Add dwc2 info of F429.
2023-11-19 16:10:16 +01:00
hathach
214a4afa6a
dwc2 flush tx,rx fifo in dcd_init()
2023-10-31 11:53:40 +07:00
hathach
db3ff4b352
usb on u5a5 hs work well with correct VBVALEXTOEN/VBVALOVAL set
2023-10-31 11:26:31 +07:00
hathach
9f0223dccd
minor clean up
2023-10-31 10:58:15 +07:00
hathach
305ef5d48a
minor space format dwc2 driver
2023-10-30 22:22:27 +07:00
hathach
a4c542a7b4
addd dwc2_info.py/md update stm32u5a5 board clock & power configure, able to get passed otg clock reset
2023-10-30 22:21:58 +07:00
hathach
27a2c8cba4
adding nulceo stm32u5a5, fix clock configure issue
...
dwc2 core stuck at reset
2023-10-18 18:43:07 +07:00
bac
1168e4e163
Added support for USB2 HS peripheral (with integrated HS PHY) on STM32U59x chips
2023-09-26 15:27:17 +01:00
Michiel van Leeuwen
75cf8e21a7
Use double-sized fifo only for IN endpoints
2023-05-04 10:02:42 +02:00
Michiel van Leeuwen
678edbe203
Check correct interrupt flag
...
Fixes #1737
2023-04-28 12:55:58 +02:00
