修改一些代码保证stm32编译通过

Merge pull request #3236 from ning3270455369/master
modified the bsp files of at32 to make them work better
2025-09-15 11:14:01 +08:00 · 2025-09-05 10:35:02 +07:00 · 2025-09-05 10:15:19 +07:00 · 2025-09-05 09:57:38 +08:00 · 2025-09-04 17:59:10 +07:00 · 2025-09-04 17:58:21 +07:00
37 changed files with 609 additions and 376 deletions
--- a/.github/copilot-instructions.md
+++ b/.github/copilot-instructions.md
@@ -0,0 +1,133 @@
+# TinyUSB
+TinyUSB is an open-source cross-platform USB Host/Device stack for embedded systems, designed to be memory-safe with no dynamic allocation and thread-safe with all interrupt events deferred to non-ISR task functions.
+
+Always reference these instructions first and fallback to search or bash commands only when you encounter unexpected information that does not match the info here.
+
+## Working Effectively
+
+### Bootstrap and Build Setup
+- Install ARM GCC toolchain: `sudo apt-get update && sudo apt-get install -y gcc-arm-none-eabi`
+- Fetch core dependencies: `python3 tools/get_deps.py` -- takes <1 second. NEVER CANCEL.
+- For specific board families: `python3 tools/get_deps.py FAMILY_NAME` (e.g., rp2040, stm32f4)
+- Dependencies are cached in `lib/` and `hw/mcu/` directories
+
+### Build Examples
+Choose ONE of these approaches:
+
+**Option 1: Individual Example with CMake (RECOMMENDED)**
+```bash
+cd examples/device/cdc_msc
+mkdir -p build && cd build
+cmake -DBOARD=stm32f407disco -DCMAKE_BUILD_TYPE=MinSizeRel ..
+cmake --build . -j4
+```
+-- takes 1-2 seconds. NEVER CANCEL. Set timeout to 5+ minutes.
+
+**Option 2: Individual Example with Make**
+```bash
+cd examples/device/cdc_msc
+make BOARD=stm32f407disco all
+```
+-- takes 2-3 seconds. NEVER CANCEL. Set timeout to 5+ minutes.
+
+**Option 3: All Examples for a Board**
+```bash
+python3 tools/build.py -b BOARD_NAME
+```
+-- takes 15-20 seconds, may have some objcopy failures that are non-critical. NEVER CANCEL. Set timeout to 30+ minutes.
+
+### Unit Testing
+- Install Ceedling: `sudo gem install ceedling`
+- Run all unit tests: `cd test/unit-test && ceedling` -- takes 4 seconds. NEVER CANCEL. Set timeout to 10+ minutes.
+- Tests use Unity framework with CMock for mocking
+
+### Documentation
+- Install requirements: `pip install -r docs/requirements.txt`
+- Build docs: `cd docs && sphinx-build -b html . _build` -- takes 2-3 seconds. NEVER CANCEL. Set timeout to 10+ minutes.
+
+### Code Quality and Validation
+- Format code: `clang-format -i path/to/file.c` (uses `.clang-format` config)
+- Check spelling: `pip install codespell && codespell` (uses `.codespellrc` config)
+- Pre-commit hooks validate unit tests and code quality automatically
+
+## Validation
+
+### ALWAYS Run These After Making Changes
+1. **Pre-commit validation** (RECOMMENDED): `pre-commit run --all-files`
+   - Install pre-commit: `pip install pre-commit && pre-commit install`
+   - Runs all quality checks, unit tests, spell checking, and formatting
+   - Takes 10-15 seconds. NEVER CANCEL. Set timeout to 15+ minutes.
+2. **Build validation**: Build at least one example that exercises your changes
+   ```bash
+   cd examples/device/cdc_msc
+   make BOARD=stm32f407disco all
+   ```
+
+### Manual Testing Scenarios
+- **Device examples**: Cannot be fully tested without real hardware, but must build successfully
+- **Unit tests**: Exercise core stack functionality - ALL tests must pass
+- **Build system**: Must be able to build examples for multiple board families
+
+### Board Selection for Testing
+- **STM32F4**: `stm32f407disco` - no external SDK required, good for testing
+- **RP2040**: `pico_sdk` - requires Pico SDK, commonly used
+- **Other families**: Check `hw/bsp/FAMILY/boards/` for available boards
+
+## Common Tasks and Time Expectations
+
+### Repository Structure Quick Reference
+```
+├── src/                  # Core TinyUSB stack
+│   ├── class/            # USB device classes (CDC, HID, MSC, Audio, etc.)
+│   ├── portable/         # MCU-specific drivers (organized by vendor)
+│   ├── device/           # USB device stack core
+│   ├── host/             # USB host stack core
+│   └── common/           # Shared utilities (FIFO, etc.)
+├── examples/             # Example applications
+│   ├── device/           # Device examples (cdc_msc, hid_generic, etc.)
+│   ├── host/             # Host examples
+│   └── dual/             # Dual-role examples
+├── hw/bsp/               # Board Support Packages
+│   └── FAMILY/boards/    # Board-specific configurations
+├── test/unit-test/       # Unit tests using Ceedling
+├── tools/                # Build and utility scripts
+└── docs/                 # Sphinx documentation
+```
+
+### Build Time Reference
+- **Dependency fetch**: <1 second
+- **Single example build**: 1-3 seconds
+- **Unit tests**: ~4 seconds
+- **Documentation build**: ~2.5 seconds
+- **Full board examples**: 15-20 seconds
+- **Toolchain installation**: 2-5 minutes (one-time)
+
+### Key Files to Know
+- `tools/get_deps.py`: Manages dependencies for MCU families
+- `tools/build.py`: Builds multiple examples, supports make/cmake
+- `src/tusb.h`: Main TinyUSB header file
+- `src/tusb_config.h`: Configuration template
+- `examples/device/cdc_msc/`: Most commonly used example for testing
+- `test/unit-test/project.yml`: Ceedling test configuration
+
+### Debugging Build Issues
+- **Missing compiler**: Install `gcc-arm-none-eabi` package
+- **Missing dependencies**: Run `python3 tools/get_deps.py FAMILY`
+- **Board not found**: Check `hw/bsp/FAMILY/boards/` for valid board names
+- **objcopy errors**: Often non-critical in full builds, try individual example builds
+
+### Working with USB Device Classes
+- **CDC (Serial)**: `src/class/cdc/` - Virtual serial port
+- **HID**: `src/class/hid/` - Human Interface Device (keyboard, mouse, etc.)
+- **MSC**: `src/class/msc/` - Mass Storage Class (USB drive)
+- **Audio**: `src/class/audio/` - USB Audio Class
+- Each class has device (`*_device.c`) and host (`*_host.c`) implementations
+
+### MCU Family Support
+- **STM32**: Largest support (F0, F1, F2, F3, F4, F7, G0, G4, H7, L4, U5, etc.)
+- **Raspberry Pi**: RP2040, RP2350 with PIO-USB host support
+- **NXP**: iMXRT, Kinetis, LPC families
+- **Microchip**: SAM D/E/G/L families
+- Check `hw/bsp/` for complete list and `docs/reference/boards.rst` for details
+
+Remember: TinyUSB is designed for embedded systems - builds are fast, tests are focused, and the codebase is optimized for resource-constrained environments.
--- a/.gitignore
+++ b/.gitignore
@@ -52,3 +52,4 @@ RelWithDebInfo
 Release
 BrowseInfo
 .cmake_build
+README_processed.rst
--- a/docs/reference/boards.rst
+++ b/docs/reference/boards.rst
@@ -30,18 +30,20 @@ max78002evkit  MAX78002 EVKIT    maxim     https://www.analog.com/en/resources/e
 Artery
 -----

-=========================  ====================================  =============  ====================================================  ======
+==============  ==============  =============  ==================================================  ======
 Board           Name            Family         URL                                                 Note
-=========================  ====================================  =============  ====================================================  ======
+==============  ==============  =============  ==================================================  ======
+at_start_f402   AT-START-F402   at32f402_405   https://www.arterychip.com/en/product/AT32F402.jsp
 at_start_f405   AT-START-F405   at32f402_405   https://www.arterychip.com/en/product/AT32F405.jsp
-at_start_f403a             AT-START-F403a                        at32f403a_407  https://www.arterychip.com/en/product/AT32F403.jsp
-at32f403a_weact_blackpill  WeAct Studio BlackPill AT32F403ACGU7  at32f403a_407  https://github.com/WeActStudio/WeActStudio.BlackPill
+at_start_f403a  AT-START-F403a  at32f403a_407  https://www.arterychip.com/en/product/AT32F403A.jsp
+at_start_f407   AT-START-F407   at32f403a_407  https://www.arterychip.com/en/product/AT32F407.jsp
 at_start_f413   AT-START-F413   at32f413       https://www.arterychip.com/en/product/AT32F413.jsp
 at_start_f415   AT-START-F415   at32f415       https://www.arterychip.com/en/product/AT32F415.jsp
 at_start_f423   AT-START-F423   at32f423       https://www.arterychip.com/en/product/AT32F423.jsp
 at_start_f425   AT-START-F425   at32f425       https://www.arterychip.com/en/product/AT32F425.jsp
+at_start_f435   AT-START-F435   at32f435_437   https://www.arterychip.com/en/product/AT32F435.jsp
 at_start_f437   AT-START-F437   at32f435_437   https://www.arterychip.com/en/product/AT32F437.jsp
-=========================  ====================================  =============  ====================================================  ======
+==============  ==============  =============  ==================================================  ======

 Bridgetek
 ---------
--- a/hw/bsp/at32f402_405/boards/at_start_f402/board.cmake
+++ b/hw/bsp/at32f402_405/boards/at_start_f402/board.cmake
@@ -0,0 +1,8 @@
+set(MCU_VARIANT AT32F402RCT7)
+set(MCU_LINKER_NAME AT32F402xC)
+
+set(JLINK_DEVICE ${MCU_VARIANT})
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC ${MCU_VARIANT})
+endfunction()
--- a/hw/bsp/at32f402_405/boards/at_start_f402/board.h
+++ b/hw/bsp/at32f402_405/boards/at_start_f402/board.h
@@ -0,0 +1,74 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: AT-START-F405
+   url: https://www.arterychip.com/en/product/AT32F405.jsp
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define USB_VBUS_IGNORE
+//#define USB_SOF_OUTPUT_ENABLE
+
+// LED
+#define LED_PORT              GPIOF
+#define LED_PIN               GPIO_PINS_4
+#define LED_STATE_ON          0 // Active Low
+#define LED_GPIO_CLK_EN()     crm_periph_clock_enable(CRM_GPIOF_PERIPH_CLOCK, TRUE)
+
+// Button
+#define BUTTON_PORT           GPIOA
+#define BUTTON_PIN            GPIO_PINS_0
+#define BUTTON_STATE_ACTIVE   1
+#define BUTTON_GPIO_CLK_EN()  crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)
+
+//USART
+#define PRINT_UART                       USART1
+#define PRINT_UART_CRM_CLK               CRM_USART1_PERIPH_CLOCK
+#define PRINT_UART_TX_PIN                GPIO_PINS_9
+#define PRINT_UART_TX_GPIO               GPIOA
+#define PRINT_UART_TX_GPIO_CRM_CLK       CRM_GPIOA_PERIPH_CLOCK
+#define PRINT_UART_TX_PIN_SOURCE         GPIO_PINS_SOURCE9
+#define PRINT_UART_TX_PIN_MUX_NUM        GPIO_MUX_7
+
+//Vbus
+static inline void board_vbus_sense_init(void)
+{
+    *(int*)(0x50000038) |= (1<<21);
+    *(int*)(0x40040038) |= (1<<21);
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
--- a/hw/bsp/at32f402_405/boards/at_start_f402/board.mk
+++ b/hw/bsp/at32f402_405/boards/at_start_f402/board.mk
@@ -0,0 +1,7 @@
+MCU_VARIANT = AT32F402RCT7
+MCU_LINKER_NAME = AT32F402xC
+
+JLINK_DEVICE = ${MCU_VARIANT}
+
+CFLAGS += \
+  -D${MCU_VARIANT}
--- a/hw/bsp/at32f402_405/boards/at_start_f405/board.cmake
+++ b/hw/bsp/at32f402_405/boards/at_start_f405/board.cmake
@@ -3,6 +3,15 @@ set(MCU_LINKER_NAME AT32F405xC)

 set(JLINK_DEVICE ${MCU_VARIANT})

+set(RHPORT_SPEED OPT_MODE_FULL_SPEED OPT_MODE_HIGH_SPEED)
+
+if (NOT DEFINED RHPORT_DEVICE)
+  set(RHPORT_DEVICE 1)
+endif()
+if (NOT DEFINED RHPORT_HOST)
+  set(RHPORT_HOST 0)
+endif()
+
 function(update_board TARGET)
  target_compile_definitions(${TARGET} PUBLIC ${MCU_VARIANT})
 endfunction()
--- a/hw/bsp/at32f402_405/boards/at_start_f405/board.h
+++ b/hw/bsp/at32f402_405/boards/at_start_f405/board.h
@@ -48,7 +48,7 @@
 // Button
 #define BUTTON_PORT           GPIOA
 #define BUTTON_PIN            GPIO_PINS_0
-#define BUTTON_STATE_ACTIVE   0
+#define BUTTON_STATE_ACTIVE   1
 #define BUTTON_GPIO_CLK_EN()  crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)

 //USART
@@ -60,111 +60,11 @@
 #define PRINT_UART_TX_PIN_SOURCE         GPIO_PINS_SOURCE9
 #define PRINT_UART_TX_PIN_MUX_NUM        GPIO_MUX_7

-//USB
-#ifdef BOARD_TUD_RHPORT
-    #if BOARD_TUD_RHPORT == 0
-        #define USB_ID                           USB_OTG1_ID
-        #define OTG_CLOCK                        CRM_OTGFS1_PERIPH_CLOCK
-        #define OTG_IRQ                          OTGFS1_IRQn
-        #define OTG_IRQ_HANDLER                  OTGFS1_IRQHandler
-        #define OTG_WKUP_IRQ                     OTGFS1_WKUP_IRQn
-        #define OTG_WKUP_HANDLER                 OTGFS1_WKUP_IRQHandler
-        #define OTG_WKUP_EXINT_LINE              EXINT_LINE_18
-        #define OTG_PIN_GPIO                     GPIOA
-        #define OTG_PIN_GPIO_CLOCK               CRM_GPIOA_PERIPH_CLOCK
-        #define OTG_PIN_VBUS                     GPIO_PINS_9
-        #define OTG_PIN_VBUS_SOURCE              GPIO_PINS_SOURCE9
-        #define OTG_PIN_ID                       GPIO_PINS_10
-        #define OTG_PIN_ID_SOURCE                GPIO_PINS_SOURCE10
-        #define OTG_PIN_SOF_GPIO                 GPIOA
-        #define OTG_PIN_SOF_GPIO_CLOCK           CRM_GPIOA_PERIPH_CLOCK
-        #define OTG_PIN_SOF                      GPIO_PINS_8
-        #define OTG_PIN_SOF_SOURCE               GPIO_PINS_SOURCE8
-        #define OTG_PIN_MUX                      GPIO_MUX_10
-        #define USB_SPEED_CORE_ID                USB_FULL_SPEED_CORE_ID
-    #elif BOARD_TUD_RHPORT == 1
-        #define USB_ID                           USB_OTG2_ID
-        #define OTG_CLOCK                        CRM_OTGHS_PERIPH_CLOCK
-        #define OTG_IRQ                          OTGHS_IRQn
-        #define OTG_IRQ_HANDLER                  OTGHS_IRQHandler
-        #define OTG_WKUP_IRQ                     OTGHS_WKUP_IRQn
-        #define OTG_WKUP_HANDLER                 OTGHS_WKUP_IRQHandler
-        #define OTG_WKUP_EXINT_LINE              EXINT_LINE_20
-        #define OTG_PIN_GPIO                     GPIOB
-        #define OTG_PIN_GPIO_CLOCK               CRM_GPIOB_PERIPH_CLOCK
-        #define OTG_PIN_VBUS                     GPIO_PINS_13
-        #define OTG_PIN_VBUS_SOURCE              GPIO_PINS_SOURCE13
-        #define OTG_PIN_ID                       GPIO_PINS_12
-        #define OTG_PIN_ID_SOURCE                GPIO_PINS_SOURCE12
-        #define OTG_PIN_SOF_GPIO                 GPIOA
-        #define OTG_PIN_SOF_GPIO_CLOCK           CRM_GPIOA_PERIPH_CLOCK
-        #define OTG_PIN_SOF                      GPIO_PINS_4
-        #define OTG_PIN_SOF_SOURCE               GPIO_PINS_SOURCE4
-        #define OTG_PIN_MUX                      GPIO_MUX_10
-        #define USB_SPEED_CORE_ID                USB_HIGH_SPEED_CORE_ID
-    #endif
-#endif
-#ifdef BOARD_TUH_RHPORT
-    #if BOARD_TUH_RHPORT == 0
-        #define USB_ID                           USB_OTG1_ID
-        #define OTG_CLOCK                        CRM_OTGFS1_PERIPH_CLOCK
-        #define OTG_IRQ                          OTGFS1_IRQn
-        #define OTG_IRQ_HANDLER                  OTGFS1_IRQHandler
-        #define OTG_WKUP_IRQ                     OTGFS1_WKUP_IRQn
-        #define OTG_WKUP_HANDLER                 OTGFS1_WKUP_IRQHandler
-        #define OTG_WKUP_EXINT_LINE              EXINT_LINE_18
-        #define OTG_PIN_GPIO                     GPIOA
-        #define OTG_PIN_GPIO_CLOCK               CRM_GPIOA_PERIPH_CLOCK
-        #define OTG_PIN_VBUS                     GPIO_PINS_9
-        #define OTG_PIN_VBUS_SOURCE              GPIO_PINS_SOURCE9
-        #define OTG_PIN_ID                       GPIO_PINS_10
-        #define OTG_PIN_ID_SOURCE                GPIO_PINS_SOURCE10
-        #define OTG_PIN_SOF_GPIO                 GPIOA
-        #define OTG_PIN_SOF_GPIO_CLOCK           CRM_GPIOA_PERIPH_CLOCK
-        #define OTG_PIN_SOF                      GPIO_PINS_8
-        #define OTG_PIN_SOF_SOURCE               GPIO_PINS_SOURCE8
-        #define OTG_PIN_MUX                      GPIO_MUX_10
-        #define USB_SPEED_CORE_ID                USB_FULL_SPEED_CORE_ID
-    #elif BOARD_TUH_RHPORT == 1
-        #define USB_ID                           USB_OTG2_ID
-        #define OTG_CLOCK                        CRM_OTGHS_PERIPH_CLOCK
-        #define OTG_IRQ                          OTGHS_IRQn
-        #define OTG_IRQ_HANDLER                  OTGHS_IRQHandler
-        #define OTG_WKUP_IRQ                     OTGHS_WKUP_IRQn
-        #define OTG_WKUP_HANDLER                 OTGHS_WKUP_IRQHandler
-        #define OTG_WKUP_EXINT_LINE              EXINT_LINE_20
-        #define OTG_PIN_GPIO                     GPIOB
-        #define OTG_PIN_GPIO_CLOCK               CRM_GPIOB_PERIPH_CLOCK
-        #define OTG_PIN_VBUS                     GPIO_PINS_13
-        #define OTG_PIN_VBUS_SOURCE              GPIO_PINS_SOURCE13
-        #define OTG_PIN_ID                       GPIO_PINS_12
-        #define OTG_PIN_ID_SOURCE                GPIO_PINS_SOURCE12
-        #define OTG_PIN_SOF_GPIO                 GPIOA
-        #define OTG_PIN_SOF_GPIO_CLOCK           CRM_GPIOA_PERIPH_CLOCK
-        #define OTG_PIN_SOF                      GPIO_PINS_4
-        #define OTG_PIN_SOF_SOURCE               GPIO_PINS_SOURCE4
-        #define OTG_PIN_MUX                      GPIO_MUX_10
-        #define USB_SPEED_CORE_ID                USB_HIGH_SPEED_CORE_ID
-    #endif
-#endif
-
 //Vbus
 static inline void board_vbus_sense_init(void)
 {
-    #ifdef BOARD_TUD_RHPORT
-        #if BOARD_TUD_RHPORT == 0
    *(int*)(0x50000038) |= (1<<21);
-        #elif BOARD_TUD_RHPORT == 1
    *(int*)(0x40040038) |= (1<<21);
-        #endif
-    #endif
-    #ifdef BOARD_TUH_RHPORT
-        #if BOARD_TUH_RHPORT == 0
-            *(int*)(0x50000038) |= (1<<21);
-        #elif BOARD_TUH_RHPORT == 1
-            *(int*)(0x40040038) |= (1<<21);
-        #endif
-    #endif
 }

 #ifdef __cplusplus
--- a/hw/bsp/at32f402_405/boards/at_start_f405/board.mk
+++ b/hw/bsp/at32f402_405/boards/at_start_f405/board.mk
@@ -3,5 +3,9 @@ MCU_LINKER_NAME = AT32F405xC

 JLINK_DEVICE = ${MCU_VARIANT}

+RHPORT_SPEED = OPT_MODE_FULL_SPEED OPT_MODE_HIGH_SPEED
+RHPORT_DEVICE ?= 1
+RHPORT_HOST ?= 0
+
 CFLAGS += \
  -D${MCU_VARIANT}
--- a/hw/bsp/at32f402_405/family.c
+++ b/hw/bsp/at32f402_405/family.c
@@ -66,10 +66,11 @@ void board_init(void)
  system_clock_config();

  /* config usb io*/
-  usb_gpio_config();
+  //usb_gpio_config();

  /* enable usb clock */
-  crm_periph_clock_enable(OTG_CLOCK, TRUE);
+  crm_periph_clock_enable(CRM_OTGFS1_PERIPH_CLOCK, TRUE);
+  crm_periph_clock_enable(CRM_OTGHS_PERIPH_CLOCK, TRUE);

  /* select usb 48m clcok source */
  usb_clock48m_select(USB_CLK_HEXT);
@@ -82,9 +83,11 @@ void board_init(void)

  #if CFG_TUSB_OS == OPT_OS_FREERTOS
    // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
-    NVIC_SetPriority(OTG_IRQ, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+    NVIC_SetPriority(OTGHS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+    NVIC_SetPriority(OTGFS1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
  #else
-    NVIC_SetPriority(OTG_IRQ, 0);
+    NVIC_SetPriority(OTGHS_IRQn, 0);
+    NVIC_SetPriority(OTGFS1_IRQn, 0);
  #endif

  /* config led and key */
@@ -160,26 +163,11 @@ void usb_clock48m_select(usb_clk48_s clk_s)

 void usb_gpio_config(void)
 {
-  gpio_init_type gpio_init_struct;
-  crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
-  gpio_default_para_init(&gpio_init_struct);
-  gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
-  gpio_init_struct.gpio_out_type  = GPIO_OUTPUT_PUSH_PULL;
-  gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
-  gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
-  #ifdef USB_SOF_OUTPUT_ENABLE
-    crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
-    gpio_init_struct.gpio_pins = OTG_PIN_SOF;
-    gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
-    gpio_pin_mux_config(OTG_PIN_SOF_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
-  #endif
-  /* otgfs use vbus pin */
-  #ifndef USB_VBUS_IGNORE
-    gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
-    gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
-    gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
-    gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
-  #endif
+  /* When the USB clock is enabled, the hardware will automatically
+  configure the pins; but other special pins that need to be used,
+  such as the pins used to detect VBUS or the pins that output the
+  SOF signal, still need to be configured separately, and these pins
+  are usually not required */
 }

 /**
--- a/hw/bsp/at32f402_405/family.cmake
+++ b/hw/bsp/at32f402_405/family.cmake
@@ -14,6 +14,23 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL

 set(FAMILY_MCUS ${AT32_FAMILY_UPPER} CACHE INTERNAL "")

+if (NOT DEFINED RHPORT_DEVICE)
+  set(RHPORT_DEVICE 0)
+endif ()
+if (NOT DEFINED RHPORT_HOST)
+  set(RHPORT_HOST 0)
+endif ()
+
+if (NOT DEFINED RHPORT_SPEED)
+  set(RHPORT_SPEED OPT_MODE_FULL_SPEED OPT_MODE_FULL_SPEED)
+endif ()
+if (NOT DEFINED RHPORT_DEVICE_SPEED)
+  list(GET RHPORT_SPEED ${RHPORT_DEVICE} RHPORT_DEVICE_SPEED)
+endif ()
+if (NOT DEFINED RHPORT_HOST_SPEED)
+  list(GET RHPORT_SPEED ${RHPORT_HOST} RHPORT_HOST_SPEED)
+endif ()
+
 #------------------------------------
 # BOARD_TARGET
 #------------------------------------
@@ -50,8 +67,10 @@ function(add_board_target BOARD_TARGET)
    ${AT32_SDK_LIB}/drivers/inc
    )
  target_compile_definitions(${BOARD_TARGET} PUBLIC
-    BOARD_TUD_RHPORT=0
-    BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+    BOARD_TUD_RHPORT=${RHPORT_DEVICE}
+    BOARD_TUD_MAX_SPEED=${RHPORT_DEVICE_SPEED}
+    BOARD_TUH_RHPORT=${RHPORT_HOST}
+    BOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED}
    )

  update_board(${BOARD_TARGET})
--- a/hw/bsp/at32f402_405/family.mk
+++ b/hw/bsp/at32f402_405/family.mk
@@ -8,10 +8,32 @@ CPU_CORE ?= cortex-m4
 CFLAGS_GCC += \
  -flto

+RHPORT_SPEED ?= OPT_MODE_FULL_SPEED OPT_MODE_FULL_SPEED
+RHPORT_DEVICE ?= 0
+RHPORT_HOST ?= 0
+
+ifndef RHPORT_DEVICE_SPEED
+ifeq ($(RHPORT_DEVICE), 0)
+  RHPORT_DEVICE_SPEED = $(firstword $(RHPORT_SPEED))
+else
+  RHPORT_DEVICE_SPEED = $(lastword $(RHPORT_SPEED))
+endif
+endif
+
+ifndef RHPORT_HOST_SPEED
+ifeq ($(RHPORT_HOST), 0)
+  RHPORT_HOST_SPEED = $(firstword $(RHPORT_SPEED))
+else
+  RHPORT_HOST_SPEED = $(lastword $(RHPORT_SPEED))
+endif
+endif
+
 CFLAGS += \
    -DCFG_TUSB_MCU=OPT_MCU_AT32F402_405 \
-	-DBOARD_TUD_RHPORT=0 \
-	-DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+	-DBOARD_TUD_RHPORT=${RHPORT_DEVICE} \
+	-DBOARD_TUD_MAX_SPEED=${RHPORT_DEVICE_SPEED} \
+	-DBOARD_TUH_RHPORT=${RHPORT_HOST} \
+	-DBOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED} \

 LDFLAGS_GCC += \
 	-flto --specs=nosys.specs -nostdlib -nostartfiles
--- a/hw/bsp/at32f403a_407/boards/at_start_f403a/board.cmake
+++ b/hw/bsp/at32f403a_407/boards/at_start_f403a/board.cmake
@@ -1,4 +1,4 @@
-set(MCU_VARIANT AT32F403ACGU7)
+set(MCU_VARIANT AT32F403AVGT7)
 set(MCU_LINKER_NAME AT32F403AxG)

 set(JLINK_DEVICE ${MCU_VARIANT})
--- a/hw/bsp/at32f403a_407/boards/at_start_f403a/board.mk
+++ b/hw/bsp/at32f403a_407/boards/at_start_f403a/board.mk
@@ -1,4 +1,4 @@
-MCU_VARIANT = AT32F403ACGU7
+MCU_VARIANT = AT32F403AVGT7
 MCU_LINKER_NAME = AT32F403AxG

 JLINK_DEVICE = ${MCU_VARIANT}
--- a/hw/bsp/at32f403a_407/boards/at_start_f407/board.cmake
+++ b/hw/bsp/at32f403a_407/boards/at_start_f407/board.cmake
@@ -0,0 +1,8 @@
+set(MCU_VARIANT AT32F407VGT7)
+set(MCU_LINKER_NAME AT32F407xG)
+
+set(JLINK_DEVICE ${MCU_VARIANT})
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC ${MCU_VARIANT})
+endfunction()
--- a/hw/bsp/at32f403a_407/boards/at_start_f407/board.h
+++ b/hw/bsp/at32f403a_407/boards/at_start_f407/board.h
@@ -0,0 +1,71 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: AT-START-F403a
+   url: https://www.arterychip.com/en/product/AT32F403.jsp
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED
+#define LED_PORT              GPIOD
+#define LED_PIN               GPIO_PINS_13
+#define LED_STATE_ON          0 // Active Low
+#define LED_GPIO_CLK_EN()     crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE)
+
+// #define LED_PORT              GPIOA
+// #define LED_PIN               GPIO_PINS_1
+// #define LED_STATE_ON          0 // Active Low
+// #define LED_GPIO_CLK_EN()     crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)
+
+// Button
+#define BUTTON_PORT           GPIOA
+#define BUTTON_PIN            GPIO_PINS_0
+#define BUTTON_STATE_ACTIVE   1
+#define BUTTON_GPIO_CLK_EN()  crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)
+
+// UART
+#define PRINT_UART                       USART1
+#define PRINT_UART_CRM_CLK               CRM_USART1_PERIPH_CLOCK
+#define PRINT_UART_TX_PIN                GPIO_PINS_9
+#define PRINT_UART_TX_GPIO               GPIOA
+#define PRINT_UART_TX_GPIO_CRM_CLK       CRM_GPIOA_PERIPH_CLOCK
+
+static inline void board_vbus_sense_init(void)
+{
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
--- a/hw/bsp/at32f403a_407/boards/at_start_f407/board.mk
+++ b/hw/bsp/at32f403a_407/boards/at_start_f407/board.mk
@@ -0,0 +1,7 @@
+MCU_VARIANT = AT32F407VGT7
+MCU_LINKER_NAME = AT32F407xG
+
+JLINK_DEVICE = ${MCU_VARIANT}
+
+CFLAGS += \
+  -D${MCU_VARIANT}
--- a/hw/bsp/at32f403a_407/family.c
+++ b/hw/bsp/at32f403a_407/family.c
@@ -29,8 +29,8 @@
 */

 #include "at32f403a_407_clock.h"
-#include "board.h"
 #include "bsp/board_api.h"
+#include "board.h"

 void usb_clock48m_select(usb_clk48_s clk_s);
 void uart_print_init(uint32_t baudrate);
@@ -102,7 +102,7 @@ void board_init(void) {
  gpio_button_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
  gpio_button_init_struct.gpio_mode = GPIO_MODE_INPUT;
  gpio_button_init_struct.gpio_pins = BUTTON_PIN;
-  gpio_button_init_struct.gpio_pull = BUTTON_PULL;
+  gpio_button_init_struct.gpio_pull = GPIO_PULL_DOWN;
  gpio_init(BUTTON_PORT, &gpio_button_init_struct);

  uart_print_init(115200);
--- a/hw/bsp/at32f413/boards/at_start_f413/board.h
+++ b/hw/bsp/at32f413/boards/at_start_f413/board.h
@@ -45,7 +45,7 @@
 // Button
 #define BUTTON_PORT           GPIOA
 #define BUTTON_PIN            GPIO_PINS_0
-#define BUTTON_STATE_ACTIVE   0
+#define BUTTON_STATE_ACTIVE   1
 #define BUTTON_GPIO_CLK_EN()  crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)

 // UART
--- a/hw/bsp/at32f415/boards/at_start_f415/board.h
+++ b/hw/bsp/at32f415/boards/at_start_f415/board.h
@@ -47,7 +47,7 @@
 // Button
 #define BUTTON_PORT           GPIOA
 #define BUTTON_PIN            GPIO_PINS_0
-#define BUTTON_STATE_ACTIVE   0
+#define BUTTON_STATE_ACTIVE   1
 #define BUTTON_GPIO_CLK_EN()  crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)

 // Usart
--- a/hw/bsp/at32f423/boards/at_start_f423/board.h
+++ b/hw/bsp/at32f423/boards/at_start_f423/board.h
@@ -47,7 +47,7 @@
 // Button
 #define BUTTON_PORT           GPIOA
 #define BUTTON_PIN            GPIO_PINS_0
-#define BUTTON_STATE_ACTIVE   0
+#define BUTTON_STATE_ACTIVE   1
 #define BUTTON_GPIO_CLK_EN()  crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)

 // UART
--- a/hw/bsp/at32f425/boards/at_start_f425/board.h
+++ b/hw/bsp/at32f425/boards/at_start_f425/board.h
@@ -47,7 +47,7 @@
 // Button
 #define BUTTON_PORT           GPIOA
 #define BUTTON_PIN            GPIO_PINS_0
-#define BUTTON_STATE_ACTIVE   0
+#define BUTTON_STATE_ACTIVE   1
 #define BUTTON_GPIO_CLK_EN()  crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)

 // Usart
--- a/hw/bsp/at32f435_437/boards/at_start_f435/board.cmake
+++ b/hw/bsp/at32f435_437/boards/at_start_f435/board.cmake
@@ -0,0 +1,8 @@
+set(MCU_VARIANT AT32F435ZMT7)
+set(MCU_LINKER_NAME AT32F435xM)
+
+set(JLINK_DEVICE ${MCU_VARIANT})
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC ${MCU_VARIANT})
+endfunction()
--- a/hw/bsp/at32f435_437/boards/at_start_f435/board.h
+++ b/hw/bsp/at32f435_437/boards/at_start_f435/board.h
@@ -0,0 +1,74 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: AT-START-F437
+   url: https://www.arterychip.com/en/product/AT32F437.jsp
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//#define USB_VBUS_IGNORE
+//#define USB_SOF_OUTPUT_ENABLE
+
+// LED
+#define LED_PORT              GPIOD
+#define LED_PIN               GPIO_PINS_13
+#define LED_STATE_ON          0 // Active Low
+#define LED_GPIO_CLK_EN()     crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE)
+
+// Button
+#define BUTTON_PORT           GPIOA
+#define BUTTON_PIN            GPIO_PINS_0
+#define BUTTON_STATE_ACTIVE   1
+#define BUTTON_GPIO_CLK_EN()  crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)
+
+// USART
+#define PRINT_UART                       USART1
+#define PRINT_UART_CRM_CLK               CRM_USART1_PERIPH_CLOCK
+#define PRINT_UART_TX_PIN                GPIO_PINS_9
+#define PRINT_UART_TX_GPIO               GPIOA
+#define PRINT_UART_TX_GPIO_CRM_CLK       CRM_GPIOA_PERIPH_CLOCK
+#define PRINT_UART_TX_PIN_SOURCE         GPIO_PINS_SOURCE9
+#define PRINT_UART_TX_PIN_MUX_NUM        GPIO_MUX_7
+
+// VBUS
+static inline void board_vbus_sense_init(void)
+{
+    *(int*)(0x50000038) |= (1<<21);
+    *(int*)(0x40040038) |= (1<<21);
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
--- a/hw/bsp/at32f435_437/boards/at_start_f435/board.mk
+++ b/hw/bsp/at32f435_437/boards/at_start_f435/board.mk
@@ -0,0 +1,7 @@
+MCU_VARIANT = AT32F435ZMT7
+MCU_LINKER_NAME = AT32F435xM
+
+JLINK_DEVICE = ${MCU_VARIANT}
+
+CFLAGS += \
+  -D${MCU_VARIANT}
--- a/hw/bsp/at32f435_437/boards/at_start_f437/board.h
+++ b/hw/bsp/at32f435_437/boards/at_start_f437/board.h
@@ -60,124 +60,11 @@
 #define PRINT_UART_TX_PIN_SOURCE         GPIO_PINS_SOURCE9
 #define PRINT_UART_TX_PIN_MUX_NUM        GPIO_MUX_7

-// USB
-#ifdef BOARD_TUD_RHPORT
-    #if BOARD_TUD_RHPORT == 0
-        #define USB_ID                           0
-        #define OTG_CLOCK                        CRM_OTGFS1_PERIPH_CLOCK
-        #define OTG_IRQ                          OTGFS1_IRQn
-        #define OTG_IRQ_HANDLER                  OTGFS1_IRQHandler
-        #define OTG_WKUP_IRQ                     OTGFS1_WKUP_IRQn
-        #define OTG_WKUP_HANDLER                 OTGFS1_WKUP_IRQHandler
-        #define OTG_WKUP_EXINT_LINE              EXINT_LINE_18
-        #define OTG_PIN_GPIO                     GPIOA
-        #define OTG_PIN_GPIO_CLOCK               CRM_GPIOA_PERIPH_CLOCK
-        #define OTG_PIN_DP                       GPIO_PINS_12
-        #define OTG_PIN_DP_SOURCE                GPIO_PINS_SOURCE12
-        #define OTG_PIN_DM                       GPIO_PINS_11
-        #define OTG_PIN_DM_SOURCE                GPIO_PINS_SOURCE11
-        #define OTG_PIN_VBUS                     GPIO_PINS_9
-        #define OTG_PIN_VBUS_SOURCE              GPIO_PINS_SOURCE9
-        #define OTG_PIN_ID                       GPIO_PINS_10
-        #define OTG_PIN_ID_SOURCE                GPIO_PINS_SOURCE12
-        #define OTG_PIN_SOF_GPIO                 GPIOA
-        #define OTG_PIN_SOF_GPIO_CLOCK           CRM_GPIOA_PERIPH_CLOCK
-        #define OTG_PIN_SOF                      GPIO_PINS_8
-        #define OTG_PIN_SOF_SOURCE               GPIO_PINS_SOURCE8
-        #define OTG_PIN_MUX                      GPIO_MUX_10
-    #elif BOARD_TUD_RHPORT == 1
-        #define USB_ID                           1
-        #define OTG_CLOCK                        CRM_OTGFS2_PERIPH_CLOCK
-        #define OTG_IRQ                          OTGFS2_IRQn
-        #define OTG_IRQ_HANDLER                  OTGFS2_IRQHandler
-        #define OTG_WKUP_IRQ                     OTGFS2_WKUP_IRQn
-        #define OTG_WKUP_HANDLER                 OTGFS2_WKUP_IRQHandler
-        #define OTG_WKUP_EXINT_LINE              EXINT_LINE_20
-        #define OTG_PIN_GPIO                     GPIOB
-        #define OTG_PIN_GPIO_CLOCK               CRM_GPIOB_PERIPH_CLOCK
-        #define OTG_PIN_DP                       GPIO_PINS_15
-        #define OTG_PIN_DP_SOURCE                GPIO_PINS_SOURCE15
-        #define OTG_PIN_DM                       GPIO_PINS_14
-        #define OTG_PIN_DM_SOURCE                GPIO_PINS_SOURCE14
-        #define OTG_PIN_VBUS                     GPIO_PINS_13
-        #define OTG_PIN_VBUS_SOURCE              GPIO_PINS_SOURCE13
-        #define OTG_PIN_ID                       GPIO_PINS_12
-        #define OTG_PIN_ID_SOURCE                GPIO_PINS_SOURCE10
-        #define OTG_PIN_SOF_GPIO                 GPIOA
-        #define OTG_PIN_SOF_GPIO_CLOCK           CRM_GPIOA_PERIPH_CLOCK
-        #define OTG_PIN_SOF                      GPIO_PINS_4
-        #define OTG_PIN_SOF_SOURCE               GPIO_PINS_SOURCE4
-        #define OTG_PIN_MUX                      GPIO_MUX_12
-    #endif
-#endif
-
-#ifdef BOARD_TUH_RHPORT
-    #if BOARD_TUH_RHPORT == 0
-        #define USB_ID                           0
-        #define OTG_CLOCK                        CRM_OTGFS1_PERIPH_CLOCK
-        #define OTG_IRQ                          OTGFS1_IRQn
-        #define OTG_IRQ_HANDLER                  OTGFS1_IRQHandler
-        #define OTG_WKUP_IRQ                     OTGFS1_WKUP_IRQn
-        #define OTG_WKUP_HANDLER                 OTGFS1_WKUP_IRQHandler
-        #define OTG_WKUP_EXINT_LINE              EXINT_LINE_18
-        #define OTG_PIN_GPIO                     GPIOA
-        #define OTG_PIN_GPIO_CLOCK               CRM_GPIOA_PERIPH_CLOCK
-        #define OTG_PIN_DP                       GPIO_PINS_12
-        #define OTG_PIN_DP_SOURCE                GPIO_PINS_SOURCE12
-        #define OTG_PIN_DM                       GPIO_PINS_11
-        #define OTG_PIN_DM_SOURCE                GPIO_PINS_SOURCE11
-        #define OTG_PIN_VBUS                     GPIO_PINS_9
-        #define OTG_PIN_VBUS_SOURCE              GPIO_PINS_SOURCE9
-        #define OTG_PIN_ID                       GPIO_PINS_10
-        #define OTG_PIN_ID_SOURCE                GPIO_PINS_SOURCE12
-        #define OTG_PIN_SOF_GPIO                 GPIOA
-        #define OTG_PIN_SOF_GPIO_CLOCK           CRM_GPIOA_PERIPH_CLOCK
-        #define OTG_PIN_SOF                      GPIO_PINS_8
-        #define OTG_PIN_SOF_SOURCE               GPIO_PINS_SOURCE8
-        #define OTG_PIN_MUX                      GPIO_MUX_10
-    #elif BOARD_TUH_RHPORT == 1
-        #define USB_ID                           1
-        #define OTG_CLOCK                        CRM_OTGFS2_PERIPH_CLOCK
-        #define OTG_IRQ                          OTGFS2_IRQn
-        #define OTG_IRQ_HANDLER                  OTGFS2_IRQHandler
-        #define OTG_WKUP_IRQ                     OTGFS2_WKUP_IRQn
-        #define OTG_WKUP_HANDLER                 OTGFS2_WKUP_IRQHandler
-        #define OTG_WKUP_EXINT_LINE              EXINT_LINE_20
-        #define OTG_PIN_GPIO                     GPIOB
-        #define OTG_PIN_GPIO_CLOCK               CRM_GPIOB_PERIPH_CLOCK
-        #define OTG_PIN_DP                       GPIO_PINS_15
-        #define OTG_PIN_DP_SOURCE                GPIO_PINS_SOURCE15
-        #define OTG_PIN_DM                       GPIO_PINS_14
-        #define OTG_PIN_DM_SOURCE                GPIO_PINS_SOURCE14
-        #define OTG_PIN_VBUS                     GPIO_PINS_13
-        #define OTG_PIN_VBUS_SOURCE              GPIO_PINS_SOURCE13
-        #define OTG_PIN_ID                       GPIO_PINS_12
-        #define OTG_PIN_ID_SOURCE                GPIO_PINS_SOURCE10
-        #define OTG_PIN_SOF_GPIO                 GPIOA
-        #define OTG_PIN_SOF_GPIO_CLOCK           CRM_GPIOA_PERIPH_CLOCK
-        #define OTG_PIN_SOF                      GPIO_PINS_4
-        #define OTG_PIN_SOF_SOURCE               GPIO_PINS_SOURCE4
-        #define OTG_PIN_MUX                      GPIO_MUX_12
-    #endif
-#endif
-
 // VBUS
 static inline void board_vbus_sense_init(void)
 {
-    #ifdef BOARD_TUD_RHPORT
-        #if BOARD_TUD_RHPORT == 0
    *(int*)(0x50000038) |= (1<<21);
-        #elif BOARD_TUD_RHPORT == 1
    *(int*)(0x40040038) |= (1<<21);
-        #endif
-    #endif
-    #ifdef BOARD_TUH_RHPORT
-        #if BOARD_TUH_RHPORT == 0
-            *(int*)(0x50000038) |= (1<<21);
-        #elif BOARD_TUH_RHPORT == 1
-            *(int*)(0x40040038) |= (1<<21);
-        #endif
-    #endif
 }

 #ifdef __cplusplus
--- a/hw/bsp/at32f435_437/family.c
+++ b/hw/bsp/at32f435_437/family.c
@@ -64,21 +64,23 @@ void board_init(void) {
  usb_gpio_config();

  /* enable usb clock */
-  crm_periph_clock_enable(OTG_CLOCK, TRUE);
+  crm_periph_clock_enable(CRM_OTGFS1_PERIPH_CLOCK, TRUE);
+  crm_periph_clock_enable(CRM_OTGFS2_PERIPH_CLOCK, TRUE);

  /* select usb 48m clcok source */
  usb_clock48m_select(USB_CLK_HEXT);

-  /* enable otgfs irq */
-  //nvic_irq_enable(OTG_IRQ, 0, 0);
-
  /* vbus ignore */
  board_vbus_sense_init();

  SysTick_Config(SystemCoreClock / 1000);
 #if CFG_TUSB_OS == OPT_OS_FREERTOS
  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
-  NVIC_SetPriority(OTG_IRQ, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+  NVIC_SetPriority(OTGFS1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+  NVIC_SetPriority(OTGFS2_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+#else
+  NVIC_SetPriority(OTGFS1_IRQn, 0);
+  NVIC_SetPriority(OTGFS2_IRQn, 0);
 #endif

  /* config led and key */
@@ -271,30 +273,22 @@ int inHandlerMode(void) {

 void usb_gpio_config(void) {
  gpio_init_type gpio_init_struct;
-  crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
+  crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
+  crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
  gpio_default_para_init(&gpio_init_struct);
  gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
  gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
  gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
  gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
  /* dp and dm */
-  gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM;
-  gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
-  gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX);
-  gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX);
-#ifdef USB_SOF_OUTPUT_ENABLE
-  crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
-  gpio_init_struct.gpio_pins = OTG_PIN_SOF;
-  gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
-  gpio_pin_mux_config(OTG_PIN_SOF_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
-#endif
-  /* otgfs use vbus pin */
-#ifndef USB_VBUS_IGNORE
-  gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
-  gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
-  gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
-  gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
-#endif
+  gpio_init_struct.gpio_pins = GPIO_PINS_11 | GPIO_PINS_12;
+  gpio_init(GPIOA, &gpio_init_struct);
+  gpio_init_struct.gpio_pins = GPIO_PINS_14 | GPIO_PINS_15;
+  gpio_init(GPIOB, &gpio_init_struct);
+  gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE11, GPIO_MUX_10);
+  gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE12, GPIO_MUX_10);
+  gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE14, GPIO_MUX_12);
+  gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE15, GPIO_MUX_12);
 }

 void board_led_write(bool state) {
--- a/hw/bsp/at32f435_437/family.cmake
+++ b/hw/bsp/at32f435_437/family.cmake
@@ -51,7 +51,10 @@ function(add_board_target BOARD_TARGET)
    ${AT32_SDK_LIB}/drivers/inc
    )
  target_compile_definitions(${BOARD_TARGET} PUBLIC
-    BOARD_TUD_RHPORT=0
+    BOARD_TUD_RHPORT=1
+    BOARD_TUH_RHPORT=0
+    BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
+    BOARD_TUH_MAX_SPEED=OPT_MODE_FULL_SPEED
    )

  update_board(${BOARD_TARGET})
--- a/hw/bsp/at32f435_437/family.mk
+++ b/hw/bsp/at32f435_437/family.mk
@@ -10,7 +10,10 @@ CFLAGS_GCC += \

 CFLAGS += \
 	-DCFG_TUSB_MCU=OPT_MCU_AT32F435_437 \
-	-DBOARD_TUD_RHPORT=0
+	-DBOARD_TUD_RHPORT=1 \
+	-DBOARD_TUH_RHPORT=0 \
+	-DBOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED \
+	-DBOARD_TUH_MAX_SPEED=OPT_MODE_FULL_SPEED \

 LDFLAGS_GCC += \
 	-flto --specs=nosys.specs -nostdlib -nostartfiles
--- a/hw/bsp/board.c
+++ b/hw/bsp/board.c
@@ -98,16 +98,16 @@ int sys_read (int fhdl, char *buf, size_t count) {
 #else

 // Default logging with on-board UART
-int sys_write (int fhdl, const char *buf, size_t count) {
-  (void) fhdl;
-  return board_uart_write(buf, (int) count);
-}
+// int sys_write (int fhdl, const char *buf, size_t count) {
+//   (void) fhdl;
+//   return board_uart_write(buf, (int) count);
+// }

-int sys_read (int fhdl, char *buf, size_t count) {
-  (void) fhdl;
-  int rd = board_uart_read((uint8_t*) buf, (int) count);
-  return (rd > 0) ? rd : -1;
-}
+// int sys_read (int fhdl, char *buf, size_t count) {
+//   (void) fhdl;
+//   int rd = board_uart_read((uint8_t*) buf, (int) count);
+//   return (rd > 0) ? rd : -1;
+// }

 #endif

--- a/hw/bsp/stm32f7/stm32f7xx_hal_conf.h
+++ b/hw/bsp/stm32f7/stm32f7xx_hal_conf.h
@@ -142,7 +142,7 @@
 #define  TICK_INT_PRIORITY            ((uint32_t)0x0FU) /*!< tick interrupt priority */
 #define  USE_RTOS                     0U
 #define  PREFETCH_ENABLE              1U
-#define  ART_ACCLERATOR_ENABLE        1U /* To enable instruction cache and prefetch */
+#define  ART_ACCELERATOR_ENABLE       1U /* To enable instruction cache and prefetch */

 #define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
 #define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
--- a/hw/bsp/stm32h7/stm32h7xx_hal_conf.h
+++ b/hw/bsp/stm32h7/stm32h7xx_hal_conf.h
@@ -1,42 +1,26 @@
 /**
  ******************************************************************************
  * @file    stm32h7xx_hal_conf_template.h
+  * @author  MCD Application Team
  * @brief   HAL configuration template file.
  *          This file should be copied to the application folder and renamed
  *          to stm32h7xx_hal_conf.h.
  ******************************************************************************
  * @attention
  *
-  * <h2><center>&copy; COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
+  * Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.
  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
  *
  ******************************************************************************
  */

 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32H7xx_HAL_CONF_H
-#define __STM32H7xx_HAL_CONF_H
+#ifndef STM32H7xx_HAL_CONF_H
+#define STM32H7xx_HAL_CONF_H

 #ifdef __cplusplus
 extern "C" {
@@ -161,7 +145,7 @@
  *        frequency, this source is inserted directly through I2S_CKIN pad.
  */
 #if !defined  (EXTERNAL_CLOCK_VALUE)
-  #define EXTERNAL_CLOCK_VALUE    12288000U /*!< Value of the External clock in Hz*/
+  #define EXTERNAL_CLOCK_VALUE    12288000UL /*!< Value of the External clock in Hz*/
 #endif /* EXTERNAL_CLOCK_VALUE */

 /* Tip: To avoid modifying this file each time you need to use different HSE,
@@ -171,42 +155,56 @@
 /**
  * @brief This is the HAL system configuration section
  */
-#define  VDD_VALUE                    ((uint32_t)3300) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            ((uint32_t)0x0F) /*!< tick interrupt priority */
+#define  VDD_VALUE                    (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY            (0x0FUL) /*!< tick interrupt priority */
 #define  USE_RTOS                     0
-#define  USE_SD_TRANSCEIVER           1U               /*!< use uSD Transceiver */
+#define  USE_SD_TRANSCEIVER           0U       /*!< use uSD Transceiver */
 #define  USE_SPI_CRC                  1U       /*!< use CRC in SPI */
+#define  USE_FLASH_ECC                0U       /*!< use ECC error management in FLASH */
+#define  USE_SDIO_TRANSCEIVER         0U       /*!< use SDIO Transceiver */
+#define  SDIO_MAX_IO_NUMBER           7U       /*!< SDIO device support maximum IO number */

 #define  USE_HAL_ADC_REGISTER_CALLBACKS     0U /* ADC register callback disabled     */
 #define  USE_HAL_CEC_REGISTER_CALLBACKS     0U /* CEC register callback disabled     */
 #define  USE_HAL_COMP_REGISTER_CALLBACKS    0U /* COMP register callback disabled    */
+#define  USE_HAL_CORDIC_REGISTER_CALLBACKS  0U /* CORDIC register callback disabled  */
 #define  USE_HAL_CRYP_REGISTER_CALLBACKS    0U /* CRYP register callback disabled    */
 #define  USE_HAL_DAC_REGISTER_CALLBACKS     0U /* DAC register callback disabled     */
 #define  USE_HAL_DCMI_REGISTER_CALLBACKS    0U /* DCMI register callback disabled    */
 #define  USE_HAL_DFSDM_REGISTER_CALLBACKS   0U /* DFSDM register callback disabled   */
 #define  USE_HAL_DMA2D_REGISTER_CALLBACKS   0U /* DMA2D register callback disabled   */
 #define  USE_HAL_DSI_REGISTER_CALLBACKS     0U /* DSI register callback disabled     */
+#define  USE_HAL_DTS_REGISTER_CALLBACKS     0U /* DTS register callback disabled     */
 #define  USE_HAL_ETH_REGISTER_CALLBACKS     0U /* ETH register callback disabled     */
 #define  USE_HAL_FDCAN_REGISTER_CALLBACKS   0U /* FDCAN register callback disabled   */
+#define  USE_HAL_FMAC_REGISTER_CALLBACKS    0U /* FMAC register callback disabled  */
 #define  USE_HAL_NAND_REGISTER_CALLBACKS    0U /* NAND register callback disabled    */
 #define  USE_HAL_NOR_REGISTER_CALLBACKS     0U /* NOR register callback disabled     */
 #define  USE_HAL_SDRAM_REGISTER_CALLBACKS   0U /* SDRAM register callback disabled   */
 #define  USE_HAL_SRAM_REGISTER_CALLBACKS    0U /* SRAM register callback disabled    */
 #define  USE_HAL_HASH_REGISTER_CALLBACKS    0U /* HASH register callback disabled    */
 #define  USE_HAL_HCD_REGISTER_CALLBACKS     0U /* HCD register callback disabled     */
+#define  USE_HAL_GFXMMU_REGISTER_CALLBACKS  0U /* GFXMMU register callback disabled  */
 #define  USE_HAL_HRTIM_REGISTER_CALLBACKS   0U /* HRTIM register callback disabled   */
 #define  USE_HAL_I2C_REGISTER_CALLBACKS     0U /* I2C register callback disabled     */
 #define  USE_HAL_I2S_REGISTER_CALLBACKS     0U /* I2S register callback disabled     */
+#define  USE_HAL_IRDA_REGISTER_CALLBACKS    0U /* IRDA register callback disabled    */
 #define  USE_HAL_JPEG_REGISTER_CALLBACKS    0U /* JPEG register callback disabled    */
 #define  USE_HAL_LPTIM_REGISTER_CALLBACKS   0U /* LPTIM register callback disabled   */
 #define  USE_HAL_LTDC_REGISTER_CALLBACKS    0U /* LTDC register callback disabled    */
 #define  USE_HAL_MDIOS_REGISTER_CALLBACKS   0U /* MDIO register callback disabled    */
+#define  USE_HAL_MMC_REGISTER_CALLBACKS     0U /* MMC register callback disabled     */
 #define  USE_HAL_OPAMP_REGISTER_CALLBACKS   0U /* MDIO register callback disabled    */
+#define  USE_HAL_OSPI_REGISTER_CALLBACKS    0U /* OSPI register callback disabled    */
+#define  USE_HAL_OTFDEC_REGISTER_CALLBACKS  0U /* OTFDEC register callback disabled  */
 #define  USE_HAL_PCD_REGISTER_CALLBACKS     0U /* PCD register callback disabled     */
 #define  USE_HAL_QSPI_REGISTER_CALLBACKS    0U /* QSPI register callback disabled    */
 #define  USE_HAL_RNG_REGISTER_CALLBACKS     0U /* RNG register callback disabled     */
 #define  USE_HAL_RTC_REGISTER_CALLBACKS     0U /* RTC register callback disabled     */
 #define  USE_HAL_SAI_REGISTER_CALLBACKS     0U /* SAI register callback disabled     */
+#define  USE_HAL_SD_REGISTER_CALLBACKS      0U /* SD register callback disabled      */
+#define  USE_HAL_SDIO_REGISTER_CALLBACKS    0U /* SDIO register callback disabled      */
+#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U /* SMARTCARD register callback disabled */
 #define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */
 #define  USE_HAL_SMBUS_REGISTER_CALLBACKS   0U /* SMBUS register callback disabled   */
 #define  USE_HAL_SPI_REGISTER_CALLBACKS     0U /* SPI register callback disabled     */
@@ -217,15 +215,15 @@
 #define  USE_HAL_WWDG_REGISTER_CALLBACKS    0U /* WWDG register callback disabled    */

 /* ########################### Ethernet Configuration ######################### */
-#define ETH_TX_DESC_CNT         4  /* number of Ethernet Tx DMA descriptors */
-#define ETH_RX_DESC_CNT         4  /* number of Ethernet Rx DMA descriptors */
+#define ETH_TX_DESC_CNT         4U  /* number of Ethernet Tx DMA descriptors */
+#define ETH_RX_DESC_CNT         4U  /* number of Ethernet Rx DMA descriptors */

-#define ETH_MAC_ADDR0    ((uint8_t)0x02)
-#define ETH_MAC_ADDR1    ((uint8_t)0x00)
-#define ETH_MAC_ADDR2    ((uint8_t)0x00)
-#define ETH_MAC_ADDR3    ((uint8_t)0x00)
-#define ETH_MAC_ADDR4    ((uint8_t)0x00)
-#define ETH_MAC_ADDR5    ((uint8_t)0x00)
+#define ETH_MAC_ADDR0    (0x02UL)
+#define ETH_MAC_ADDR1    (0x00UL)
+#define ETH_MAC_ADDR2    (0x00UL)
+#define ETH_MAC_ADDR3    (0x00UL)
+#define ETH_MAC_ADDR4    (0x00UL)
+#define ETH_MAC_ADDR5    (0x00UL)

 /* ########################## Assert Selection ############################## */
 /**
@@ -477,7 +475,4 @@
 }
 #endif

-#endif /* __STM32H7xx_HAL_CONF_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+#endif /* STM32H7xx_HAL_CONF_H */
--- a/lib/rt-thread/tusb_config.h
+++ b/lib/rt-thread/tusb_config.h
@@ -84,7 +84,7 @@ extern "C" {
 #endif

 #ifndef BOARD_DEVICE_RHPORT_SPEED
-#define BOARD_DEVICE_RHPORT_SPEED   PKG_TINYUSB_DEVICE_PORT_SPEED
+#define BOARD_DEVICE_RHPORT_SPEED   OPT_MODE_FULL_SPEED
 #endif

 #if   BOARD_DEVICE_RHPORT_NUM == 0
@@ -103,11 +103,11 @@ extern "C" {
 * - CFG_TUSB_MEM_ALIGN   : __attribute__ ((aligned(4)))
 */
 #ifndef CFG_TUSB_MEM_SECTION
-#define CFG_TUSB_MEM_SECTION        rt_section(PKG_TINYUSB_MEM_SECTION)
+#define CFG_TUSB_MEM_SECTION
 #endif

 #ifndef CFG_TUSB_MEM_ALIGN
-#define CFG_TUSB_MEM_ALIGN          rt_align(PKG_TINYUSB_MEM_ALIGN)
+#define CFG_TUSB_MEM_ALIGN          __attribute__ ((aligned(4)))
 #endif

 //--------------------------------------------------------------------
@@ -120,16 +120,20 @@ extern "C" {
 #endif

 #ifndef CFG_TUD_ENDPOINT0_SIZE
-#define CFG_TUD_ENDPOINT0_SIZE        PKG_TINYUSB_EDPT0_SIZE
+#define CFG_TUD_ENDPOINT0_SIZE        8
+#endif
+
+#ifndef CFG_TUD_CDC
+#define CFG_TUD_CDC                   1
 #endif

 // CDC FIFO size of TX and RX
-#define CFG_TUD_CDC_RX_BUFSIZE        PKG_TINYUSB_DEVICE_CDC_RX_BUFSIZE
-#define CFG_TUD_CDC_TX_BUFSIZE        PKG_TINYUSB_DEVICE_CDC_TX_BUFSIZE
+#define CFG_TUD_CDC_RX_BUFSIZE        128
+#define CFG_TUD_CDC_TX_BUFSIZE        128

-#define CFG_TUD_MSC_EP_BUFSIZE        PKG_TINYUSB_DEVICE_MSC_EP_BUFSIZE
+#define CFG_TUD_MSC_EP_BUFSIZE        32

-#define CFG_TUD_HID_EP_BUFSIZE        PKG_TINYUSB_DEVICE_HID_EP_BUFSIZE
+#define CFG_TUD_HID_EP_BUFSIZE        32

 #ifndef PKG_TINYUSB_DEVICE_CDC_STRING
 #define PKG_TINYUSB_DEVICE_CDC_STRING ""
--- a/lib/rt-thread/tusb_rt_thread_port.c
+++ b/lib/rt-thread/tusb_rt_thread_port.c
@@ -25,6 +25,7 @@
 */
 #ifdef __RTTHREAD__
 #include <rtthread.h>
+#include "bsp_init.h"

 #define  DBG_TAG  "TinyUSB"
 #define  DBG_LVL  DBG_INFO
@@ -57,13 +58,13 @@ static int init_tinyusb(void)
 {
    rt_thread_t tid;

-    tusb_board_init();
+    // tusb_board_init();
    tusb_init();

 #ifdef RT_USING_HEAP
    tid = rt_thread_create("tusb", tusb_thread_entry, RT_NULL,
-                           PKG_TINYUSB_STACK_SIZE,
-                           PKG_TINYUSB_THREAD_PRIORITY, 10);
+                           2048,
+                           5, 10);
    if (tid == RT_NULL)
 #else
    rt_err_t result;
@@ -82,5 +83,6 @@ static int init_tinyusb(void)

    return 0;
 }
-INIT_APP_EXPORT(init_tinyusb);
+// INIT_APP_EXPORT(init_tinyusb);
+extern_init(tinyusb, init_tinyusb);
 #endif /*__RTTHREAD__*/
--- a/src/osal/osal_rtthread.h
+++ b/src/osal/osal_rtthread.h
@@ -45,27 +45,30 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_task_delay(uint32_t msec) {
 //--------------------------------------------------------------------+
 // Spinlock API
 //--------------------------------------------------------------------+
-typedef struct rt_spinlock osal_spinlock_t;
+typedef struct rt_mutex osal_spinlock_t;

 #define OSAL_SPINLOCK_DEF(_name, _int_set) \
  osal_spinlock_t _name

 TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
-  rt_spin_lock_init(ctx);
+  // rt_spin_lock_init(ctx);
+  rt_mutex_init(ctx, "tusb", RT_IPC_FLAG_PRIO);
 }

 TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
  if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
    return; // single core MCU does not need to lock in ISR
  }
-  rt_spin_lock(ctx);
+  // rt_spin_lock(ctx);
+  rt_mutex_take(ctx, RT_WAITING_FOREVER);
 }

 TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
  if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
    return; // single core MCU does not need to lock in ISR
  }
-  rt_spin_unlock(ctx);
+  // rt_spin_unlock(ctx);
+  rt_mutex_release(ctx);
 }

 //--------------------------------------------------------------------+
--- a/src/portable/synopsys/dwc2/dwc2_stm32.h
+++ b/src/portable/synopsys/dwc2/dwc2_stm32.h
@@ -48,11 +48,11 @@ extern "C" {

 #elif CFG_TUSB_MCU == OPT_MCU_STM32F4
  #include "stm32f4xx.h"
-  #define EP_MAX_FS       USB_OTG_FS_MAX_IN_ENDPOINTS
-  #define EP_FIFO_SIZE_FS USB_OTG_FS_TOTAL_FIFO_SIZE
+  #define EP_MAX_FS       4
+  #define EP_FIFO_SIZE_FS 256

-  #define EP_MAX_HS       USB_OTG_HS_MAX_IN_ENDPOINTS
-  #define EP_FIFO_SIZE_HS USB_OTG_HS_TOTAL_FIFO_SIZE
+  #define EP_MAX_HS       4
+  #define EP_FIFO_SIZE_HS 256

 #elif CFG_TUSB_MCU == OPT_MCU_STM32H7
  #include "stm32h7xx.h"
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -59,7 +59,7 @@ deps_optional = {
                            'a1bdae309a14ec95a4f64a96d3315a4f89c397c6',
                            'kinetis_k kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx imxrt'],
    'hw/mcu/raspberry_pi/Pico-PIO-USB': ['https://github.com/sekigon-gonnoc/Pico-PIO-USB.git',
-                                         '3c1eec341a5232640e4c00628b889b641af34b28',
+                                         '675543bcc9baa8170f868ab7ba316d418dbcf41f',
                                         'rp2040'],
    'hw/mcu/renesas/fsp': ['https://github.com/renesas/fsp.git',
                           'edcc97d684b6f716728a60d7a6fea049d9870bd6',
@@ -74,7 +74,7 @@ deps_optional = {
                                                 '2ec2a1538362696118dc3fdf56f33dacaf8f4067',
                                                 'spresense'],
    'hw/mcu/st/cmsis_device_c0': ['https://github.com/STMicroelectronics/cmsis_device_c0.git',
-                                  'fb56b1b70c73b74eacda2a4bcc36886444364ab3',
+                                  '517611273f835ffe95318947647bc1408f69120d',
                                  'stm32c0'],
    'hw/mcu/st/cmsis_device_f0': ['https://github.com/STMicroelectronics/cmsis_device_f0.git',
                                  'cbb5da5d48b4b5f2efacdc2f033be30f9d29889f',
@@ -89,7 +89,7 @@ deps_optional = {
                                  '5558e64e3675a1e1fcb1c71f468c7c407c1b1134',
                                  'stm32f3'],
    'hw/mcu/st/cmsis_device_f4': ['https://github.com/STMicroelectronics/cmsis_device_f4.git',
-                                  '0fa0e489e053fa1ca7790bb40b4d76458f64c55d',
+                                  '3c77349ce04c8af401454cc51f85ea9a50e34fc1',
                                  'stm32f4'],
    'hw/mcu/st/cmsis_device_f7': ['https://github.com/STMicroelectronics/cmsis_device_f7.git',
                                  '2352e888e821aa0f4fe549bd5ea81d29c67a3222',
@@ -104,31 +104,31 @@ deps_optional = {
                                  '45b818cab6ee2806e3a27c80e330957223424392',
                                  'stm32h7'],
    'hw/mcu/st/cmsis_device_h7rs': ['https://github.com/STMicroelectronics/cmsis_device_h7rs.git',
-                                  '832649d1fd09bd901e9f68e979522e5c209ebf20',
+                                  '57ea11f70ebf1850e1048989d665c9070f0bb863',
                                  'stm32h7rs'],
    'hw/mcu/st/cmsis_device_h5': ['https://github.com/STMicroelectronics/cmsis_device_h5.git',
-                                  'cd2d1d579743de57b88ccaf61a968b9c05848ffc',
+                                  '5273b8f134ba65f5b8174c4141b711b5c0d295b2',
                                  'stm32h5'],
    'hw/mcu/st/cmsis_device_l0': ['https://github.com/STMicroelectronics/cmsis_device_l0.git',
-                                  '69cd5999fd40ae6e546d4905b21635c6ca1bcb92',
+                                  '7b7ae8cd71437331e1d7824f157d00c7bb4a5044',
                                  'stm32l0'],
    'hw/mcu/st/cmsis_device_l1': ['https://github.com/STMicroelectronics/cmsis_device_l1.git',
-                                  '7f16ec0a1c4c063f84160b4cc6bf88ad554a823e',
+                                  'a23ade4ccf14012085fedf862e33a536ab7ed8be',
                                  'stm32l1'],
    'hw/mcu/st/cmsis_device_l4': ['https://github.com/STMicroelectronics/cmsis_device_l4.git',
                                  'a2530753e86dd326a75467d28feb92e2ba7d0df2',
                                  'stm32l4'],
    'hw/mcu/st/cmsis_device_l5': ['https://github.com/STMicroelectronics/cmsis_device_l5.git',
-                                  'd922865fc0326a102c26211c44b8e42f52c1e53d',
+                                  '7d9a51481f0e6c376e62c3c849e6caf652c66482',
                                  'stm32l5'],
    'hw/mcu/st/cmsis_device_n6': ['https://github.com/STMicroelectronics/cmsis-device-n6.git',
-                                  'f818b00f775444e8d19ef6cad822534c345e054f',
+                                  '7bcdc944fbf7cf5928d3c1d14054ca13261d33ec',
                                  'stm32n6'],
    'hw/mcu/st/cmsis_device_u5': ['https://github.com/STMicroelectronics/cmsis_device_u5.git',
-                                  '5ad9797c54ec3e55eff770fc9b3cd4a1aefc1309',
+                                  '6e67187dec98035893692ab2923914cb5f4e0117',
                                  'stm32u5'],
    'hw/mcu/st/cmsis_device_wb': ['https://github.com/STMicroelectronics/cmsis_device_wb.git',
-                                  'd6a7fa2e7de084f5e5e47f2ab88b022fe9b50e5a',
+                                  'cda2cb9fc4a5232ab18efece0bb06b0b60910083',
                                  'stm32wb'],
    'hw/mcu/st/stm32-mfxstm32l152': ['https://github.com/STMicroelectronics/stm32-mfxstm32l152.git',
                                     '7f4389efee9c6a655b55e5df3fceef5586b35f9b',
Author	SHA1	Message	Date
ranchuan	8a1d7f9512	修改一些代码保证stm32编译通过 Some checks failed Build / set-matrix (push) Has been cancelled Details Build / cmake (aarch64-gcc) (push) Has been cancelled Details Build / cmake (arm-gcc) (push) Has been cancelled Details Build / cmake (esp-idf) (push) Has been cancelled Details Build / cmake (msp430-gcc) (push) Has been cancelled Details Build / cmake (riscv-gcc) (push) Has been cancelled Details Build / make (aarch64-gcc) (push) Has been cancelled Details Build / make (arm-gcc) (push) Has been cancelled Details Build / make (msp430-gcc) (push) Has been cancelled Details Build / make (riscv-gcc) (push) Has been cancelled Details Build / make (rx-gcc) (push) Has been cancelled Details Build / arm-iar (make) (push) Has been cancelled Details Build / make-os (macos-latest) (push) Has been cancelled Details Build / make-os (windows-latest) (push) Has been cancelled Details Build / zephyr (push) Has been cancelled Details Build / hil-build (arm-gcc) (push) Has been cancelled Details Build / hil-build (esp-idf) (push) Has been cancelled Details Build / hil-tinyusb (push) Has been cancelled Details Build / hil-hfp (push) Has been cancelled Details pre-commit / pre-commit (push) Has been cancelled Details CodeQL / Analyze (c-cpp) (push) Has been cancelled Details	2025-09-15 11:14:01 +08:00
Ha Thach	8304587d77	Merge pull request #3236 from ning3270455369/master modified the bsp files of at32 to make them work better	2025-09-05 10:35:02 +07:00
hathach	a379efcbf5	fix pre-commit	2025-09-05 10:15:19 +07:00
zhiqiang	3b983cb3e9	the family name error of at32 has been corrected	2025-09-05 09:57:38 +08:00
Copilot	89f8fbc9c2	Create comprehensive GitHub Copilot instructions and fix pre-commit configuration for TinyUSB (#3234 ) * Initial plan * Create comprehensive GitHub Copilot instructions for TinyUSB Co-authored-by: hathach <249515+hathach@users.noreply.github.com> * Remove accidentally committed dependencies, use tools/get_deps.py instead Co-authored-by: hathach <249515+hathach@users.noreply.github.com> * Fix .gitignore: ignore vendor/ directory not ceedling script Co-authored-by: hathach <249515+hathach@users.noreply.github.com> * Revert .gitignore changes and add README_processed.rst Co-authored-by: hathach <249515+hathach@users.noreply.github.com> * Remove README_processed.rst and revert ceedling file permissions Co-authored-by: hathach <249515+hathach@users.noreply.github.com> * Changes before error encountered Co-authored-by: hathach <249515+hathach@users.noreply.github.com> * Remove redundant manual validation step, keep only pre-commit and build validation Co-authored-by: hathach <249515+hathach@users.noreply.github.com> * fix pre-commit --------- Co-authored-by: copilot-swe-agent[bot] <198982749+Copilot@users.noreply.github.com> Co-authored-by: hathach <249515+hathach@users.noreply.github.com>	2025-09-04 17:59:10 +07:00
Ha Thach	b2cdea9813	Merge pull request #3237 from hathach/update-pio-usb update pio-usb	2025-09-04 17:58:21 +07:00
hathach	90080d4326	update pio-usb	2025-09-04 17:24:00 +07:00
Ha Thach	4ec81ba324	Merge pull request #3235 from hathach/copilot/fix-3209 Update all STM32 CMSIS and HAL dependencies to fix HSITRIM register bug	2025-09-04 17:08:17 +07:00
copilot-swe-agent[bot]	78ab527a55	Update all STM32 CMSIS device dependencies to latest versions Co-authored-by: hathach <249515+hathach@users.noreply.github.com>	2025-09-04 08:54:51 +00:00
hathach	4b716ec52c	fix linker h745 issue with clang	2025-09-04 15:27:06 +07:00
zhiqiang	f6ca80ab13	modified the bsp files of at32 to make them work better	2025-09-04 14:38:27 +08:00