40 lines
1.0 KiB
Makefile
40 lines
1.0 KiB
Makefile
CFLAGS += \
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-mthumb \
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-mabi=aapcs \
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-mcpu=cortex-m0plus \
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-nostdlib \
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-DCORE_M0PLUS \
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-D__VTOR_PRESENT=0 \
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-DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \
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-D__USE_LPCOPEN \
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-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \
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-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
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# All source paths should be relative to the top level.
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LD_FILE = hw/bsp/lpcxpresso11u68/lpc11u68.ld
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SRC_C += \
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hw/mcu/nxp/lpc_driver/lpc_chip_11u6x/src/chip_11u6x.c \
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hw/mcu/nxp/lpc_driver/lpc_chip_11u6x/src/clock_11u6x.c \
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hw/mcu/nxp/lpc_driver/lpc_chip_11u6x/src/gpio_11u6x.c \
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hw/mcu/nxp/lpc_driver/lpc_chip_11u6x/src/iocon_11u6x.c \
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hw/mcu/nxp/lpc_driver/lpc_chip_11u6x/src/syscon_11u6x.c \
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hw/mcu/nxp/lpc_driver/lpc_chip_11u6x/src/sysinit_11u6x.c
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INC += \
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$(TOP)/hw/mcu/nxp/lpc_driver/lpc_chip_11u6x/inc
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# For TinyUSB port source
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VENDOR = nxp
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CHIP_FAMILY = lpc11_13_15
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# For freeRTOS port source
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FREERTOS_PORT = ARM_CM0
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# For flash-jlink target
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JLINK_DEVICE = LPC11U68
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JLINK_IF = swd
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# flash using jlink
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flash: flash-jlink
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