hathach 3eb0451879 change CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT (not defined) to 1 ...

use stock iar linker

2025-07-07 20:31:49 +07:00

..

boards/stm32h7s3nucleo

hw/h7rs: Update linker to put RTT in DTCM

2025-06-13 22:49:06 +02:00

FreeRTOSConfig

Add NUCLEO-H7S3L8 BSP.

2025-01-24 16:56:40 +01:00

linker

change CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT (not defined) to 1

2025-07-07 20:31:49 +07:00

family.c

Revise DCache with RTT section

2025-07-04 12:10:56 +02:00

family.cmake

change CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT (not defined) to 1

2025-07-07 20:31:49 +07:00

family.mk

change CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT (not defined) to 1

2025-07-07 20:31:49 +07:00

stm32h7rsxx_hal_conf.h

Fix CI.

2025-01-24 17:17:06 +01:00