8e143fc962
This adds source files that allow to run TinyUSB stack on DA1469x-dk-pro board. Source files .c .S and .ld are taken from Apache Mynewt repository. Those files were stripped to allow starting board without Mynewt os.
160 lines
4.2 KiB
C
160 lines
4.2 KiB
C
/*
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* Licensed to the Apache Software Foundation (ASF) under one
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* or more contributor license agreements. See the NOTICE file
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* distributed with this work for additional information
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* regarding copyright ownership. The ASF licenses this file
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* to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance
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* with the License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing,
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* software distributed under the License is distributed on an
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* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
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* KIND, either express or implied. See the License for the
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* specific language governing permissions and limitations
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* under the License.
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*/
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#include <assert.h>
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#include <stdbool.h>
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#include <stdint.h>
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#include "syscfg/syscfg.h"
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#include "mcu/da1469x_hal.h"
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#include "mcu/da1469x_clock.h"
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static inline bool
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da1469x_clock_is_xtal32m_settled(void)
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{
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return ((*(uint32_t *)0x5001001c & 0xff00) == 0) &&
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((*(uint32_t *)0x50010054 & 0x000f) != 0xb);
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}
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void
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da1469x_clock_sys_xtal32m_init(void)
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{
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uint32_t reg;
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int xtalrdy_cnt;
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/* Number of lp_clk cycles (~30.5us) */
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xtalrdy_cnt = MYNEWT_VAL(MCU_CLOCK_XTAL32M_SETTLE_TIME_US) * 10 / 305;
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reg = CRG_XTAL->XTALRDY_CTRL_REG;
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reg &= ~(CRG_XTAL_XTALRDY_CTRL_REG_XTALRDY_CLK_SEL_Msk |
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CRG_XTAL_XTALRDY_CTRL_REG_XTALRDY_CNT_Msk);
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reg |= xtalrdy_cnt;
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CRG_XTAL->XTALRDY_CTRL_REG = reg;
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}
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void
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da1469x_clock_sys_xtal32m_enable(void)
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{
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PDC->PDC_CTRL0_REG = (2 << PDC_PDC_CTRL0_REG_TRIG_SELECT_Pos) |
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(15 << PDC_PDC_CTRL0_REG_TRIG_ID_Pos) |
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(1 << PDC_PDC_CTRL0_REG_PDC_MASTER_Pos) |
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(1 << PDC_PDC_CTRL0_REG_EN_XTAL_Pos);
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PDC->PDC_SET_PENDING_REG = 0;
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PDC->PDC_ACKNOWLEDGE_REG = 0;
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}
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void
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da1469x_clock_sys_xtal32m_switch(void)
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{
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if (CRG_TOP->CLK_CTRL_REG & CRG_TOP_CLK_CTRL_REG_RUNNING_AT_RC32M_Msk) {
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CRG_TOP->CLK_SWITCH2XTAL_REG = CRG_TOP_CLK_SWITCH2XTAL_REG_SWITCH2XTAL_Msk;
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} else {
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CRG_TOP->CLK_CTRL_REG &= ~CRG_TOP_CLK_CTRL_REG_SYS_CLK_SEL_Msk;
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}
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while (!(CRG_TOP->CLK_CTRL_REG & CRG_TOP_CLK_CTRL_REG_RUNNING_AT_XTAL32M_Msk));
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}
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void
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da1469x_clock_sys_xtal32m_wait_to_settle(void)
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{
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uint32_t primask;
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__HAL_DISABLE_INTERRUPTS(primask);
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NVIC_ClearPendingIRQ(XTAL32M_RDY_IRQn);
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if (!da1469x_clock_is_xtal32m_settled()) {
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NVIC_EnableIRQ(XTAL32M_RDY_IRQn);
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while (!NVIC_GetPendingIRQ(XTAL32M_RDY_IRQn)) {
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__WFI();
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}
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NVIC_DisableIRQ(XTAL32M_RDY_IRQn);
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}
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__HAL_ENABLE_INTERRUPTS(primask);
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}
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void
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da1469x_clock_sys_xtal32m_switch_safe(void)
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{
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da1469x_clock_sys_xtal32m_wait_to_settle();
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da1469x_clock_sys_xtal32m_switch();
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}
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void
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da1469x_clock_sys_rc32m_disable(void)
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{
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CRG_TOP->CLK_RC32M_REG &= ~CRG_TOP_CLK_RC32M_REG_RC32M_ENABLE_Msk;
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}
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void
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da1469x_clock_lp_xtal32k_enable(void)
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{
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CRG_TOP->CLK_XTAL32K_REG |= CRG_TOP_CLK_XTAL32K_REG_XTAL32K_ENABLE_Msk;
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}
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void
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da1469x_clock_lp_xtal32k_switch(void)
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{
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CRG_TOP->CLK_CTRL_REG = (CRG_TOP->CLK_CTRL_REG &
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~CRG_TOP_CLK_CTRL_REG_LP_CLK_SEL_Msk) |
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(2 << CRG_TOP_CLK_CTRL_REG_LP_CLK_SEL_Pos);
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}
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void
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da1469x_clock_pll_disable(void)
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{
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while (CRG_TOP->CLK_CTRL_REG & CRG_TOP_CLK_CTRL_REG_RUNNING_AT_PLL96M_Msk) {
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CRG_TOP->CLK_SWITCH2XTAL_REG = CRG_TOP_CLK_SWITCH2XTAL_REG_SWITCH2XTAL_Msk;
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}
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CRG_XTAL->PLL_SYS_CTRL1_REG &= ~CRG_XTAL_PLL_SYS_CTRL1_REG_PLL_EN_Msk;
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}
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void
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da1469x_clock_pll_wait_to_lock(void)
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{
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uint32_t primask;
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__HAL_DISABLE_INTERRUPTS(primask);
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NVIC_ClearPendingIRQ(PLL_LOCK_IRQn);
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if (!da1469x_clock_is_pll_locked()) {
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NVIC_EnableIRQ(PLL_LOCK_IRQn);
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while (!NVIC_GetPendingIRQ(PLL_LOCK_IRQn)) {
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__WFI();
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}
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NVIC_DisableIRQ(PLL_LOCK_IRQn);
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}
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__HAL_ENABLE_INTERRUPTS(primask);
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}
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void
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da1469x_clock_sys_pll_switch(void)
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{
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/* CLK_SEL_Msk == 3 means PLL */
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CRG_TOP->CLK_CTRL_REG |= CRG_TOP_CLK_CTRL_REG_SYS_CLK_SEL_Msk;
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while (!(CRG_TOP->CLK_CTRL_REG & CRG_TOP_CLK_CTRL_REG_RUNNING_AT_PLL96M_Msk));
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}
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