58 lines
2.6 KiB
C
58 lines
2.6 KiB
C
#ifndef BOARD_H
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#define BOARD_H
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//--------------------------------------------------------------------+
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// MACRO TYPEDEF CONSTANT ENUM
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//--------------------------------------------------------------------+
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#define LED_PORT 0
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#define LED_PIN 29
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#define LED_STATE_ON 0
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// WAKE button
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#define BUTTON_PORT 0
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#define BUTTON_PIN 24
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// IOCON pin mux
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#define IOCON_PIO_DIGITAL_EN 0x80u /*!< Enables digital function */
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#define IOCON_PIO_FUNC1 0x01u /*!< Selects pin function 1 */
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#define IOCON_PIO_FUNC7 0x07u /*!< Selects pin function 7 */
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#define IOCON_PIO_INPFILT_OFF 0x0100u /*!< Input filter disabled */
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#define IOCON_PIO_INV_DI 0x00u /*!< Input function is not inverted */
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#define IOCON_PIO_MODE_INACT 0x00u /*!< No addition pin function */
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#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!< Open drain is disabled */
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#define IOCON_PIO_SLEW_STANDARD 0x00u /*!< Standard mode, output slew rate control is enabled */
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/****************************************************************
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name: BOARD_BootClockFROHF96M
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outputs:
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- {id: SYSTICK_clock.outFreq, value: 96 MHz}
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- {id: System_clock.outFreq, value: 96 MHz}
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settings:
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- {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf}
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sources:
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- {id: SYSCON.fro_hf.outFreq, value: 96 MHz}
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******************************************************************/
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static inline void BootClockFROHF96M(void) {
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/*!< Set up the clock sources */
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/*!< Set up FRO */
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POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
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CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without
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accidentally being below the voltage for current speed */
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POWER_SetVoltageForFreq(96000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
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CLOCK_SetFLASHAccessCyclesForFreq(96000000U); /*!< Set FLASH wait states for core */
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CLOCK_SetupFROClocking(96000000U); /*!< Set up high frequency FRO output to selected frequency */
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/*!< Set up dividers */
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CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
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CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 0U, true); /*!< Reset SYSTICKCLKDIV divider counter and halt it */
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CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 1U, false); /*!< Set SYSTICKCLKDIV divider to value 1 */
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/*!< Set up clock selectors - Attach clocks to the peripheries */
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CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
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/*!< Set SystemCoreClock variable. */
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SystemCoreClock = 96000000U;
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}
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#endif
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