128 lines
		
	
	
		
			4.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			128 lines
		
	
	
		
			4.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * The MIT License (MIT)
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|  *
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|  * Copyright (c) 2021, Ha Thach (tinyusb.org)
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|  *
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|  * Permission is hereby granted, free of charge, to any person obtaining a copy
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|  * of this software and associated documentation files (the "Software"), to deal
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|  * in the Software without restriction, including without limitation the rights
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|  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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|  * copies of the Software, and to permit persons to whom the Software is
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|  * furnished to do so, subject to the following conditions:
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|  *
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|  * The above copyright notice and this permission notice shall be included in
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|  * all copies or substantial portions of the Software.
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|  *
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|  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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|  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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|  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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|  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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|  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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|  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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|  * THE SOFTWARE.
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|  *
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|  * This file is part of the TinyUSB stack.
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|  */
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| 
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| /* metadata:
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|    name: STM32 F769 Discovery
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|    url: https://www.st.com/en/evaluation-tools/32f769idiscovery.html
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| */
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| 
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| #ifndef BOARD_H_
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| #define BOARD_H_
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| 
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| #ifdef __cplusplus
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|  extern "C" {
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| #endif
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| 
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| #define UART_DEV              USART1
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| #define UART_CLK_EN           __HAL_RCC_USART1_CLK_ENABLE
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| 
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| // VBUS Sense detection
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| #define OTG_FS_VBUS_SENSE     1
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| #define OTG_HS_VBUS_SENSE     0
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| 
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| #define PINID_LED      0
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| #define PINID_BUTTON   1
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| #define PINID_UART_TX  2
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| #define PINID_UART_RX  3
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| //#define PINID_VBUS0_EN 4
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| //#define PINID_VBUS1_EN 5
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| 
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| static board_pindef_t board_pindef[] = {
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|   { // LED
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|     .port = GPIOJ,
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|     .pin_init = { .Pin = GPIO_PIN_12, .Mode = GPIO_MODE_OUTPUT_PP, .Pull = GPIO_PULLDOWN, .Speed = GPIO_SPEED_HIGH, .Alternate = 0 },
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|     .active_state = 1
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|   },
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|   { // Button
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|     .port = GPIOA,
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|     .pin_init = { .Pin = GPIO_PIN_0, .Mode = GPIO_MODE_INPUT, .Pull = GPIO_PULLDOWN, .Speed = GPIO_SPEED_HIGH, .Alternate = 0 },
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|     .active_state = 1
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|   },
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|   { // UART TX
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|     .port = GPIOA,
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|     .pin_init = { .Pin = GPIO_PIN_9, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_HIGH, .Alternate = GPIO_AF7_USART1 },
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|     .active_state = 0
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|   },
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|   { // UART RX
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|     .port = GPIOA,
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|     .pin_init = { .Pin = GPIO_PIN_10, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_HIGH, .Alternate = GPIO_AF7_USART1 },
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|     .active_state = 0
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|   },
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| };
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| 
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| //--------------------------------------------------------------------+
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| // RCC Clock
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| //--------------------------------------------------------------------+
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| static inline void board_clock_init(void)
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| {
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|   RCC_ClkInitTypeDef RCC_ClkInitStruct;
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|   RCC_OscInitTypeDef RCC_OscInitStruct;
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| 
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|   /* Enable Power Control clock */
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|   __HAL_RCC_PWR_CLK_ENABLE();
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| 
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|   /* The voltage scaling allows optimizing the power consumption when the device is
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|      clocked below the maximum system frequency, to update the voltage scaling value
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|      regarding system frequency refer to product datasheet.  */
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|   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
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| 
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|   /* Enable HSE Oscillator and activate PLL with HSE as source */
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|   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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|   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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|   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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|   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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|   RCC_OscInitStruct.PLL.PLLM = HSE_VALUE/1000000;
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|   RCC_OscInitStruct.PLL.PLLN = 432;
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|   RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
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|   RCC_OscInitStruct.PLL.PLLQ = 9;
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|   RCC_OscInitStruct.PLL.PLLR = 7;
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|   HAL_RCC_OscConfig(&RCC_OscInitStruct);
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| 
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|   /* Activate the OverDrive to reach the 216 MHz Frequency */
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|   HAL_PWREx_EnableOverDrive();
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| 
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|   /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
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|   RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
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|   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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|   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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|   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
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|   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
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| 
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|   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7);
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| 
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|   UART_CLK_EN();
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| }
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| 
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| static inline void board_vbus_set(uint8_t rhport, bool state) {
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|   (void) rhport; (void) state;
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| }
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| 
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| #ifdef __cplusplus
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|  }
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| #endif
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| 
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| #endif /* BOARD_H_ */
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