2a67ce773d
add cmake for ch32v20x, skip freertos examples for CH32V20X, also skip net webserver due to lack of RAM update to use openocd with wlinke adapter
70 lines
2.2 KiB
Makefile
70 lines
2.2 KiB
Makefile
# https://www.embecosm.com/resources/tool-chain-downloads/#riscv-stable
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#CROSS_COMPILE ?= riscv32-unknown-elf-
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# Toolchain from https://nucleisys.com/download.php
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#CROSS_COMPILE ?= riscv-nuclei-elf-
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# Toolchain from https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack
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CROSS_COMPILE ?= riscv-none-elf-
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# Submodules
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CH32V307_SDK = hw/mcu/wch/ch32v307
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# WCH-SDK paths
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CH32V307_SDK_SRC = $(CH32V307_SDK)/EVT/EXAM/SRC
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include $(TOP)/$(BOARD_PATH)/board.mk
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CPU_CORE ?= rv32imac-ilp32
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CFLAGS += \
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-flto \
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-msmall-data-limit=8 \
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-mno-save-restore -Os \
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-fmessage-length=0 \
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-fsigned-char \
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-ffunction-sections \
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-fdata-sections \
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-DCFG_TUSB_MCU=OPT_MCU_CH32V307 \
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-Xlinker --gc-sections \
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-DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
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LDFLAGS_GCC += \
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-nostdlib -nostartfiles \
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--specs=nosys.specs --specs=nano.specs
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SRC_C += \
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src/portable/wch/dcd_ch32_usbhs.c \
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$(CH32V307_SDK_SRC)/Core/core_riscv.c \
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$(CH32V307_SDK_SRC)/Peripheral/src/ch32v30x_gpio.c \
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$(CH32V307_SDK_SRC)/Peripheral/src/ch32v30x_misc.c \
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$(CH32V307_SDK_SRC)/Peripheral/src/ch32v30x_rcc.c \
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$(CH32V307_SDK_SRC)/Peripheral/src/ch32v30x_usart.c
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SRC_S += \
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$(CH32V307_SDK_SRC)/Startup/startup_ch32v30x_D8C.S
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INC += \
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$(TOP)/$(BOARD_PATH) \
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$(TOP)/$(CH32V307_SDK_SRC)/Peripheral/inc
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# For freeRTOS port source
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FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RISC-V
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# wch-link is not supported yet in official openOCD yet. We need to either use
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# 1. download openocd as part of mounriver studio http://www.mounriver.com/download or
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# 2. compiled from modified source https://github.com/kprasadvnsi/riscv-openocd-wch
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#
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# Note: For Linux, somehow openocd in mounriver studio does not seem to have wch-link enable,
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# therefore we need to compile it from source as follows:
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# git clone https://github.com/kprasadvnsi/riscv-openocd-wch
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# cd riscv-openocd-wch
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# ./bootstrap
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# ./configure CFLAGS="-Wno-error" --enable-wlink
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# make
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# openocd binaries will be generated in riscv-openocd-wch/src
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# flash target ROM bootloader
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OPENOCD_WCH = /home/${USER}/app/riscv-openocd-wch/src/openocd
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flash: $(BUILD)/$(PROJECT).elf
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$(OPENOCD_WCH) -f $(TOP)/$(FAMILY_PATH)/wch-riscv.cfg -c init -c halt -c "program $<" -c wlink_reset_resume -c exit
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