219 lines
9.5 KiB
C
219 lines
9.5 KiB
C
/*
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* @brief LPC18xx basic chip inclusion file
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*
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __CHIP_LPC18XX_H_
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#define __CHIP_LPC18XX_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "lpc_types.h"
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#include "sys_config.h"
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#ifndef CORE_M3
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#error CORE_M3 is not defined for the LPC18xx architecture
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#error CORE_M3 should be defined as part of your compiler define list
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#endif
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#ifndef CHIP_LPC18XX
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#error The LPC18XX Chip include path is used for this build, but
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#error CHIP_LPC18XX is not defined!
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#endif
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/** @defgroup PERIPH_18XX_BASE CHIP: LPC18xx Peripheral addresses and register set declarations
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* @ingroup CHIP_18XX_43XX_Drivers
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* @{
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*/
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#define LPC_SCT_BASE 0x40000000
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#define LPC_GPDMA_BASE 0x40002000
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#define LPC_SPIFI_BASE 0x40003000
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#define LPC_SDMMC_BASE 0x40004000
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#define LPC_EMC_BASE 0x40005000
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#define LPC_USB0_BASE 0x40006000
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#define LPC_USB1_BASE 0x40007000
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#define LPC_LCD_BASE 0x40008000
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#define LPC_FMCA_BASE 0x4000C000
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#define LPC_FMCB_BASE 0x4000D000
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#define LPC_ETHERNET_BASE 0x40010000
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#define LPC_ATIMER_BASE 0x40040000
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#define LPC_REGFILE_BASE 0x40041000
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#define LPC_PMC_BASE 0x40042000
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#define LPC_CREG_BASE 0x40043000
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#define LPC_EVRT_BASE 0x40044000
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#define LPC_OTP_BASE 0x40045000
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#define LPC_RTC_BASE 0x40046000
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#define LPC_CGU_BASE 0x40050000
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#define LPC_CCU1_BASE 0x40051000
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#define LPC_CCU2_BASE 0x40052000
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#define LPC_RGU_BASE 0x40053000
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#define LPC_WWDT_BASE 0x40080000
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#define LPC_USART0_BASE 0x40081000
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#define LPC_USART2_BASE 0x400C1000
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#define LPC_USART3_BASE 0x400C2000
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#define LPC_UART1_BASE 0x40082000
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#define LPC_SSP0_BASE 0x40083000
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#define LPC_SSP1_BASE 0x400C5000
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#define LPC_TIMER0_BASE 0x40084000
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#define LPC_TIMER1_BASE 0x40085000
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#define LPC_TIMER2_BASE 0x400C3000
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#define LPC_TIMER3_BASE 0x400C4000
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#define LPC_SCU_BASE 0x40086000
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#define LPC_PIN_INT_BASE 0x40087000
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#define LPC_GPIO_GROUP_INT0_BASE 0x40088000
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#define LPC_GPIO_GROUP_INT1_BASE 0x40089000
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#define LPC_MCPWM_BASE 0x400A0000
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#define LPC_I2C0_BASE 0x400A1000
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#define LPC_I2C1_BASE 0x400E0000
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#define LPC_I2S0_BASE 0x400A2000
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#define LPC_I2S1_BASE 0x400A3000
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#define LPC_C_CAN1_BASE 0x400A4000
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#define LPC_RITIMER_BASE 0x400C0000
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#define LPC_QEI_BASE 0x400C6000
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#define LPC_GIMA_BASE 0x400C7000
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#define LPC_DAC_BASE 0x400E1000
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#define LPC_C_CAN0_BASE 0x400E2000
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#define LPC_ADC0_BASE 0x400E3000
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#define LPC_ADC1_BASE 0x400E4000
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#define LPC_GPIO_PORT_BASE 0x400F4000
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#define LPC_SPI_BASE 0x40100000
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#define LPC_SGPIO_BASE 0x40101000
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#define LPC_EEPROM_BASE 0x4000E000
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#define LPC_ROM_API_BASE 0x10400100
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#define LPC_SCT ((LPC_SCT_T *) LPC_SCT_BASE)
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#define LPC_GPDMA ((LPC_GPDMA_T *) LPC_GPDMA_BASE)
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#define LPC_SPIFI ((LPC_SPIFI_T *) LPC_SPIFI_BASE)
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#define LPC_SDMMC ((LPC_SDMMC_T *) LPC_SDMMC_BASE)
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#define LPC_EMC ((LPC_EMC_T *) LPC_EMC_BASE)
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#define LPC_USB0 ((LPC_USBHS_T *) LPC_USB0_BASE)
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#define LPC_USB1 ((LPC_USBHS_T *) LPC_USB1_BASE)
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#define LPC_LCD ((LPC_LCD_T *) LPC_LCD_BASE)
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#define LPC_ETHERNET ((LPC_ENET_T *) LPC_ETHERNET_BASE)
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#define LPC_ATIMER ((LPC_ATIMER_T *) LPC_ATIMER_BASE)
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#define LPC_REGFILE ((LPC_REGFILE_T *) LPC_REGFILE_BASE)
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#define LPC_PMC ((LPC_PMC_T *) LPC_PMC_BASE)
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#define LPC_EVRT ((LPC_EVRT_T *) LPC_EVRT_BASE)
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#define LPC_RTC ((LPC_RTC_T *) LPC_RTC_BASE)
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#define LPC_CGU ((LPC_CGU_T *) LPC_CGU_BASE)
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#define LPC_CCU1 ((LPC_CCU1_T *) LPC_CCU1_BASE)
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#define LPC_CCU2 ((LPC_CCU2_T *) LPC_CCU2_BASE)
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#define LPC_CREG ((LPC_CREG_T *) LPC_CREG_BASE)
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#define LPC_RGU ((LPC_RGU_T *) LPC_RGU_BASE)
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#define LPC_WWDT ((LPC_WWDT_T *) LPC_WWDT_BASE)
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#define LPC_USART0 ((LPC_USART_T *) LPC_USART0_BASE)
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#define LPC_USART2 ((LPC_USART_T *) LPC_USART2_BASE)
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#define LPC_USART3 ((LPC_USART_T *) LPC_USART3_BASE)
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#define LPC_UART1 ((LPC_USART_T *) LPC_UART1_BASE)
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#define LPC_SSP0 ((LPC_SSP_T *) LPC_SSP0_BASE)
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#define LPC_SSP1 ((LPC_SSP_T *) LPC_SSP1_BASE)
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#define LPC_TIMER0 ((LPC_TIMER_T *) LPC_TIMER0_BASE)
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#define LPC_TIMER1 ((LPC_TIMER_T *) LPC_TIMER1_BASE)
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#define LPC_TIMER2 ((LPC_TIMER_T *) LPC_TIMER2_BASE)
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#define LPC_TIMER3 ((LPC_TIMER_T *) LPC_TIMER3_BASE)
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#define LPC_SCU ((LPC_SCU_T *) LPC_SCU_BASE)
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#define LPC_GPIO_PIN_INT ((LPC_PIN_INT_T *) LPC_PIN_INT_BASE)
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#define LPC_GPIOGROUP ((LPC_GPIOGROUPINT_T *) LPC_GPIO_GROUP_INT0_BASE)
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#define LPC_MCPWM ((LPC_MCPWM_T *) LPC_MCPWM_BASE)
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#define LPC_I2C0 ((LPC_I2C_T *) LPC_I2C0_BASE)
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#define LPC_I2C1 ((LPC_I2C_T *) LPC_I2C1_BASE)
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#define LPC_I2S0 ((LPC_I2S_T *) LPC_I2S0_BASE)
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#define LPC_I2S1 ((LPC_I2S_T *) LPC_I2S1_BASE)
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#define LPC_C_CAN1 ((LPC_CCAN_T *) LPC_C_CAN1_BASE)
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#define LPC_RITIMER ((LPC_RITIMER_T *) LPC_RITIMER_BASE)
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#define LPC_QEI ((LPC_QEI_T *) LPC_QEI_BASE)
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#define LPC_GIMA ((LPC_GIMA_T *) LPC_GIMA_BASE)
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#define LPC_DAC ((LPC_DAC_T *) LPC_DAC_BASE)
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#define LPC_C_CAN0 ((LPC_CCAN_T *) LPC_C_CAN0_BASE)
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#define LPC_ADC0 ((LPC_ADC_T *) LPC_ADC0_BASE)
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#define LPC_ADC1 ((LPC_ADC_T *) LPC_ADC1_BASE)
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#define LPC_GPIO_PORT ((LPC_GPIO_T *) LPC_GPIO_PORT_BASE)
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#define LPC_EEPROM ((LPC_EEPROM_T *) LPC_EEPROM_BASE)
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#define LPC_FMCA ((LPC_FMC_T *) LPC_FMCA_BASE)
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#define LPC_FMCB ((LPC_FMC_T *) LPC_FMCB_BASE)
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#define LPC_ROM_API ((LPC_ROM_API_T *) LPC_ROM_API_BASE)
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/**
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* @}
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*/
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#include "scu_18xx_43xx.h"
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#include "clock_18xx_43xx.h"
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#include "rgu_18xx_43xx.h"
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#include "creg_18xx_43xx.h"
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#include "evrt_18xx_43xx.h"
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#include "otp_18xx_43xx.h"
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#include "sdif_18xx_43xx.h"
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#include "adc_18xx_43xx.h"
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#include "atimer_18xx_43xx.h"
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#include "aes_18xx_43xx.h"
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#include "ccan_18xx_43xx.h"
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#include "dac_18xx_43xx.h"
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#include "eeprom_18xx_43xx.h"
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#include "emc_18xx_43xx.h"
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#include "enet_18xx_43xx.h"
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#include "fmc_18xx_43xx.h"
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#include "i2c_18xx_43xx.h"
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#include "i2s_18xx_43xx.h"
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#include "gima_18xx_43xx.h"
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#include "gpdma_18xx_43xx.h"
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#include "gpio_18xx_43xx.h"
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#include "pinint_18xx_43xx.h"
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#include "gpiogroup_18xx_43xx.h"
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#include "lcd_18xx_43xx.h"
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#include "mcpwm_18xx_43xx.h"
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#include "pmc_18xx_43xx.h"
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#include "qei_18xx_43xx.h"
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#include "ritimer_18xx_43xx.h"
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#include "rtc_18xx_43xx.h"
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#include "sct_18xx_43xx.h"
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#include "sct_pwm_18xx_43xx.h"
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#include "sdmmc_18xx_43xx.h"
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#include "sdio_18xx_43xx.h"
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#include "spifi_18xx_43xx.h"
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#include "ssp_18xx_43xx.h"
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#include "timer_18xx_43xx.h"
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#include "uart_18xx_43xx.h"
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#include "usbhs_18xx_43xx.h"
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#include "wwdt_18xx_43xx.h"
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#include "romapi_18xx_43xx.h"
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#include "i2cm_18xx_43xx.h"
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#ifdef __cplusplus
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}
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#endif
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#endif /* __CHIP_LPC18XX_H_ */
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