110 lines
		
	
	
		
			3.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			110 lines
		
	
	
		
			3.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * The MIT License (MIT)
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|  *
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|  * Copyright (c) 2020, Ha Thach (tinyusb.org)
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|  *
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|  * Permission is hereby granted, free of charge, to any person obtaining a copy
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|  * of this software and associated documentation files (the "Software"), to deal
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|  * in the Software without restriction, including without limitation the rights
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|  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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|  * copies of the Software, and to permit persons to whom the Software is
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|  * furnished to do so, subject to the following conditions:
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|  *
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|  * The above copyright notice and this permission notice shall be included in
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|  * all copies or substantial portions of the Software.
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|  *
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|  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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|  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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|  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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|  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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|  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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|  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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|  * THE SOFTWARE.
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|  *
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|  * This file is part of the TinyUSB stack.
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|  */
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| 
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| /* metadata:
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|    name: STM32 G491 Nucleo
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|    url: https://www.st.com/en/evaluation-tools/nucleo-g491re.html
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| */
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| 
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| #ifndef BOARD_H_
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| #define BOARD_H_
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| 
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| #ifdef __cplusplus
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|  extern "C" {
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| #endif
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| 
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| // G474RE Nucleo does not has usb connection. We need to manually connect
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| // - PA12 for D+, CN10.12
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| // - PA11 for D-, CN10.14
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| 
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| // LED
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| #define LED_PORT              GPIOA
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| #define LED_PIN               GPIO_PIN_5
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| #define LED_STATE_ON          0
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| 
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| // Button
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| #define BUTTON_PORT           GPIOC
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| #define BUTTON_PIN            GPIO_PIN_13
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| #define BUTTON_STATE_ACTIVE   1
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| 
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| // UART Enable for STLink VCOM
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| #define UART_DEV              LPUART1
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| #define UART_CLK_EN           __HAL_RCC_LPUART1_CLK_ENABLE
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| #define UART_GPIO_PORT        GPIOA
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| #define UART_GPIO_AF          GPIO_AF12_LPUART1
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| #define UART_TX_PIN           GPIO_PIN_2
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| #define UART_RX_PIN           GPIO_PIN_3
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| 
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| 
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| //--------------------------------------------------------------------+
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| // RCC Clock
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| //--------------------------------------------------------------------+
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| static inline void board_clock_init(void)
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| {
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|   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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|   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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|   RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
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| 
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|   // Configure the main internal regulator output voltage
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|   HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
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| 
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|   // Initializes the CPU, AHB and APB buses clocks
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|   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE;
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|   RCC_OscInitStruct.HSEState       = RCC_HSE_ON;
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|   RCC_OscInitStruct.HSI48State     = RCC_HSI48_ON;
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|   RCC_OscInitStruct.PLL.PLLState   = RCC_PLL_ON;
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|   RCC_OscInitStruct.PLL.PLLSource  = RCC_PLLSOURCE_HSE;
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|   RCC_OscInitStruct.PLL.PLLM       = RCC_PLLM_DIV6;
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|   RCC_OscInitStruct.PLL.PLLN       = 85;
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|   RCC_OscInitStruct.PLL.PLLP       = RCC_PLLP_DIV2;
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|   RCC_OscInitStruct.PLL.PLLQ       = RCC_PLLQ_DIV2;
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|   RCC_OscInitStruct.PLL.PLLR       = RCC_PLLR_DIV2;
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|   HAL_RCC_OscConfig(&RCC_OscInitStruct);
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| 
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|   // Initializes the CPU, AHB and APB buses clocks
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|   RCC_ClkInitStruct.ClockType      = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
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|   RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK;
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|   RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1;
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|   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
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|   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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|   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
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| 
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|   PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
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|   PeriphClkInit.UsbClockSelection    = RCC_USBCLKSOURCE_HSI48;
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|   HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) ;
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| }
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| 
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| static inline void board_vbus_sense_init(void)
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| {
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|   // Enable VBUS sense (B device) via pin PA9
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| }
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| 
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| #ifdef __cplusplus
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|  }
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| #endif
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| 
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| #endif /* BOARD_H_ */
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