439 lines
13 KiB
C
439 lines
13 KiB
C
/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2019 Ha Thach (tinyusb.org)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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#include "tusb_option.h"
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#if TUSB_OPT_HOST_ENABLED & CFG_TUH_MSC
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//--------------------------------------------------------------------+
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// INCLUDE
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//--------------------------------------------------------------------+
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#include "common/tusb_common.h"
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#include "msc_host.h"
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//--------------------------------------------------------------------+
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// MACRO CONSTANT TYPEDEF
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//--------------------------------------------------------------------+
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enum
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{
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MSC_STAGE_IDLE = 0,
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MSC_STAGE_CMD,
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MSC_STAGE_DATA,
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MSC_STAGE_STATUS,
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};
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typedef struct
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{
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uint8_t itf_num;
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uint8_t ep_in;
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uint8_t ep_out;
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uint8_t max_lun;
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volatile bool mounted;
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uint8_t stage;
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void* buffer;
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tuh_msc_complete_cb_t complete_cb;
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msc_cbw_t cbw;
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msc_csw_t csw;
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}msch_interface_t;
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CFG_TUSB_MEM_SECTION static msch_interface_t msch_data[CFG_TUSB_HOST_DEVICE_MAX];
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// buffer used to read scsi information when mounted, largest response data currently is inquiry
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CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(4) static uint8_t msch_buffer[sizeof(scsi_inquiry_resp_t)];
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static inline msch_interface_t* get_itf(uint8_t dev_addr)
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{
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return &msch_data[dev_addr-1];
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}
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//--------------------------------------------------------------------+
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// PUBLIC API
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//--------------------------------------------------------------------+
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uint8_t tuh_msc_get_maxlun(uint8_t dev_addr)
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{
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msch_interface_t* p_msc = get_itf(dev_addr);
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return p_msc->max_lun;
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}
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bool tuh_msc_mounted(uint8_t dev_addr)
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{
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msch_interface_t* p_msc = get_itf(dev_addr);
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// is configured can be omitted
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return tuh_device_is_configured(dev_addr) && p_msc->mounted;
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}
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bool tuh_msc_is_busy(uint8_t dev_addr)
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{
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msch_interface_t* p_msc = get_itf(dev_addr);
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return p_msc->mounted && hcd_edpt_busy(dev_addr, p_msc->ep_in);
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}
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//--------------------------------------------------------------------+
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// PUBLIC API: SCSI COMMAND
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//--------------------------------------------------------------------+
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static inline void cbw_init(msc_cbw_t *cbw, uint8_t lun)
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{
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tu_memclr(cbw, sizeof(msc_cbw_t));
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cbw->signature = MSC_CBW_SIGNATURE;
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cbw->tag = 0x54555342; // TUSB
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cbw->lun = lun;
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}
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bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tuh_msc_complete_cb_t complete_cb)
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{
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msch_interface_t* p_msc = get_itf(dev_addr);
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// TU_VERIFY(p_msc->mounted); // TODO part of the enumeration also use scsi command
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// TODO claim endpoint
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p_msc->cbw = *cbw;
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p_msc->stage = MSC_STAGE_CMD;
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p_msc->buffer = data;
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p_msc->complete_cb = complete_cb;
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TU_ASSERT(usbh_edpt_xfer(dev_addr, p_msc->ep_out, (uint8_t*) &p_msc->cbw, sizeof(msc_cbw_t)));
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return true;
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}
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bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_resp_t* response, tuh_msc_complete_cb_t complete_cb)
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{
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msch_interface_t* p_msc = get_itf(dev_addr);
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TU_VERIFY(p_msc->mounted);
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msc_cbw_t cbw;
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cbw_init(&cbw, lun);
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cbw.total_bytes = sizeof(scsi_read_capacity10_resp_t);
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cbw.dir = TUSB_DIR_IN_MASK;
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cbw.cmd_len = sizeof(scsi_read_capacity10_t);
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cbw.command[0] = SCSI_CMD_READ_CAPACITY_10;
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return tuh_msc_scsi_command(dev_addr, &cbw, response, complete_cb);
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}
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bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response, tuh_msc_complete_cb_t complete_cb)
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{
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msc_cbw_t cbw;
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cbw_init(&cbw, lun);
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cbw.total_bytes = sizeof(scsi_inquiry_resp_t);
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cbw.dir = TUSB_DIR_IN_MASK;
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cbw.cmd_len = sizeof(scsi_inquiry_t);
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scsi_inquiry_t const cmd_inquiry =
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{
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.cmd_code = SCSI_CMD_INQUIRY,
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.alloc_length = sizeof(scsi_inquiry_resp_t)
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};
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memcpy(cbw.command, &cmd_inquiry, cbw.cmd_len);
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return tuh_msc_scsi_command(dev_addr, &cbw, response, complete_cb);
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}
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bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_t complete_cb)
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{
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msc_cbw_t cbw;
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cbw_init(&cbw, lun);
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cbw.total_bytes = 0; // Number of bytes
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cbw.dir = TUSB_DIR_OUT;
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cbw.cmd_len = sizeof(scsi_test_unit_ready_t);
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cbw.command[0] = SCSI_CMD_TEST_UNIT_READY;
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cbw.command[1] = lun; // according to wiki TODO need verification
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return tuh_msc_scsi_command(dev_addr, &cbw, NULL, complete_cb);
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}
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bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *resposne, tuh_msc_complete_cb_t complete_cb)
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{
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msc_cbw_t cbw;
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cbw_init(&cbw, lun);
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cbw.total_bytes = 18; // TODO sense response
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cbw.dir = TUSB_DIR_IN_MASK;
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cbw.cmd_len = sizeof(scsi_request_sense_t);
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scsi_request_sense_t const cmd_request_sense =
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{
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.cmd_code = SCSI_CMD_REQUEST_SENSE,
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.alloc_length = 18
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};
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memcpy(cbw.command, &cmd_request_sense, cbw.cmd_len);
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return tuh_msc_scsi_command(dev_addr, &cbw, resposne, complete_cb);
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}
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bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb)
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{
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msch_interface_t* p_msc = get_itf(dev_addr);
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TU_VERIFY(p_msc->mounted);
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msc_cbw_t cbw;
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cbw_init(&cbw, lun);
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cbw.total_bytes = 512*block_count; // Number of bytes TODO get block size from READ CAPACITY 10
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cbw.dir = TUSB_DIR_IN_MASK;
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cbw.cmd_len = sizeof(scsi_read10_t);
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scsi_read10_t cmd_read10 =
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{
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.cmd_code = SCSI_CMD_READ_10,
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.lba = tu_htonl(lba),
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.block_count = tu_htons(block_count)
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};
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memcpy(cbw.command, &cmd_read10, cbw.cmd_len);
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return tuh_msc_scsi_command(dev_addr, &cbw, buffer, complete_cb);
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}
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bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb)
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{
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msch_interface_t* p_msc = get_itf(dev_addr);
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TU_VERIFY(p_msc->mounted);
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msc_cbw_t cbw;
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cbw_init(&cbw, lun);
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cbw.total_bytes = 512*block_count; // Number of bytes TODO get block size from READ CAPACITY 10
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cbw.dir = TUSB_DIR_OUT;
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cbw.cmd_len = sizeof(scsi_write10_t);
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scsi_write10_t cmd_write10 =
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{
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.cmd_code = SCSI_CMD_WRITE_10,
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.lba = tu_htonl(lba),
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.block_count = tu_htons(block_count)
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};
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memcpy(cbw.command, &cmd_write10, cbw.cmd_len);
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return tuh_msc_scsi_command(dev_addr, &cbw, (void*) buffer, complete_cb);
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}
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#if 0
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// MSC interface Reset (not used now)
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bool tuh_msc_reset(uint8_t dev_addr)
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{
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tusb_control_request_t const new_request =
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{
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.bmRequestType_bit =
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{
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.recipient = TUSB_REQ_RCPT_INTERFACE,
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.type = TUSB_REQ_TYPE_CLASS,
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.direction = TUSB_DIR_OUT
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},
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.bRequest = MSC_REQ_RESET,
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.wValue = 0,
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.wIndex = p_msc->itf_num,
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.wLength = 0
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};
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TU_ASSERT( usbh_control_xfer( dev_addr, &new_request, NULL ) );
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}
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#endif
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//--------------------------------------------------------------------+
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// CLASS-USBH API (don't require to verify parameters)
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//--------------------------------------------------------------------+
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void msch_init(void)
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{
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tu_memclr(msch_data, sizeof(msch_interface_t)*CFG_TUSB_HOST_DEVICE_MAX);
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}
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void msch_close(uint8_t dev_addr)
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{
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msch_interface_t* p_msc = get_itf(dev_addr);
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tu_memclr(p_msc, sizeof(msch_interface_t));
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tuh_msc_unmounted_cb(dev_addr); // invoke Application Callback
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}
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bool msch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes)
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{
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msch_interface_t* p_msc = get_itf(dev_addr);
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msc_cbw_t const * cbw = &p_msc->cbw;
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msc_csw_t * csw = &p_msc->csw;
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switch (p_msc->stage)
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{
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case MSC_STAGE_CMD:
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// Must be Command Block
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TU_ASSERT(ep_addr == p_msc->ep_out && event == XFER_RESULT_SUCCESS && xferred_bytes == sizeof(msc_cbw_t));
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if ( cbw->total_bytes && p_msc->buffer )
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{
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// Data stage if any
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p_msc->stage = MSC_STAGE_DATA;
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uint8_t const ep_data = (cbw->dir & TUSB_DIR_IN_MASK) ? p_msc->ep_in : p_msc->ep_out;
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TU_ASSERT(usbh_edpt_xfer(dev_addr, ep_data, p_msc->buffer, cbw->total_bytes));
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}else
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{
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// Status stage
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p_msc->stage = MSC_STAGE_STATUS;
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TU_ASSERT(usbh_edpt_xfer(dev_addr, p_msc->ep_in, (uint8_t*) &p_msc->csw, sizeof(msc_csw_t)));
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}
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break;
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case MSC_STAGE_DATA:
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// Status stage
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p_msc->stage = MSC_STAGE_STATUS;
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TU_ASSERT(usbh_edpt_xfer(dev_addr, p_msc->ep_in, (uint8_t*) &p_msc->csw, sizeof(msc_csw_t)));
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break;
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case MSC_STAGE_STATUS:
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// SCSI op is complete
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p_msc->stage = MSC_STAGE_IDLE;
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if (p_msc->complete_cb) p_msc->complete_cb(dev_addr, cbw, csw);
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break;
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// unknown state
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default: break;
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}
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return true;
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}
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//--------------------------------------------------------------------+
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// MSC Enumeration
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//--------------------------------------------------------------------+
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static bool config_get_maxlun_complete (uint8_t dev_addr, tusb_control_request_t const * request, xfer_result_t result);
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static bool config_test_unit_ready_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw);
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static bool config_request_sense_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw);
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bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf_desc, uint16_t *p_length)
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{
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TU_VERIFY (MSC_SUBCLASS_SCSI == itf_desc->bInterfaceSubClass &&
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MSC_PROTOCOL_BOT == itf_desc->bInterfaceProtocol);
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msch_interface_t* p_msc = get_itf(dev_addr);
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//------------- Open Data Pipe -------------//
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tusb_desc_endpoint_t const * ep_desc = (tusb_desc_endpoint_t const *) tu_desc_next(itf_desc);
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for(uint32_t i=0; i<2; i++)
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{
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TU_ASSERT(TUSB_DESC_ENDPOINT == ep_desc->bDescriptorType && TUSB_XFER_BULK == ep_desc->bmAttributes.xfer);
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TU_ASSERT(usbh_edpt_open(rhport, dev_addr, ep_desc));
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if ( tu_edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN )
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{
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p_msc->ep_in = ep_desc->bEndpointAddress;
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}else
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{
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p_msc->ep_out = ep_desc->bEndpointAddress;
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}
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ep_desc = (tusb_desc_endpoint_t const *) tu_desc_next(ep_desc);
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}
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p_msc->itf_num = itf_desc->bInterfaceNumber;
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(*p_length) += sizeof(tusb_desc_interface_t) + 2*sizeof(tusb_desc_endpoint_t);
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return true;
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}
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bool msch_set_config(uint8_t dev_addr, uint8_t itf_num)
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{
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msch_interface_t* p_msc = get_itf(dev_addr);
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TU_ASSERT(p_msc->itf_num == itf_num);
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//------------- Get Max Lun -------------//
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TU_LOG2("MSC Get Max Lun\r\n");
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tusb_control_request_t request =
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{
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.bmRequestType_bit =
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{
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.recipient = TUSB_REQ_RCPT_INTERFACE,
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.type = TUSB_REQ_TYPE_CLASS,
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.direction = TUSB_DIR_IN
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},
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.bRequest = MSC_REQ_GET_MAX_LUN,
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.wValue = 0,
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.wIndex = itf_num,
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.wLength = 1
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};
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TU_ASSERT(tuh_control_xfer(dev_addr, &request, &p_msc->max_lun, config_get_maxlun_complete));
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return true;
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}
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static bool config_get_maxlun_complete (uint8_t dev_addr, tusb_control_request_t const * request, xfer_result_t result)
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{
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(void) request;
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msch_interface_t* p_msc = get_itf(dev_addr);
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// STALL means zero
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p_msc->max_lun = (XFER_RESULT_SUCCESS == result) ? msch_buffer[0] : 0;
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p_msc->max_lun++; // MAX LUN is minus 1 by specs
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// TODO multiple LUN support
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TU_LOG2("SCSI Test Unit Ready\r\n");
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tuh_msc_test_unit_ready(dev_addr, 0, config_test_unit_ready_complete);
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return true;
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}
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static bool config_test_unit_ready_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw)
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{
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if (csw->status == 0)
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{
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msch_interface_t* p_msc = get_itf(dev_addr);
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usbh_driver_set_config_complete(dev_addr, p_msc->itf_num);
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// Unit is ready, Enumeration is complete
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p_msc->mounted = true;
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tuh_msc_mounted_cb(dev_addr);
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}else
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{
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// Note: During enumeration, some device fails Test Unit Ready and require a few retries
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// with Request Sense to start working !!
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// TODO limit number of retries
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TU_ASSERT(tuh_msc_request_sense(dev_addr, cbw->lun, msch_buffer, config_request_sense_complete));
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}
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return true;
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}
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static bool config_request_sense_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw)
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{
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TU_ASSERT(csw->status == 0);
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TU_ASSERT(tuh_msc_test_unit_ready(dev_addr, cbw->lun, config_test_unit_ready_complete));
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return true;
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}
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#endif
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