hathach 4da5de707b have p4 dma somewhat working but having issue with buffer that does not occupy the whole cache line

2024-11-20 20:38:20 +07:00

..

dcd_dwc2.c

have p4 dma somewhat working but having issue with buffer that does not occupy the whole cache line

2024-11-20 20:38:20 +07:00

dwc2_bcm.h

Fix DMA FIFO reservation.

2024-04-25 23:23:43 +02:00

dwc2_common.c

have p4 dma somewhat working but having issue with buffer that does not occupy the whole cache line

2024-11-20 20:38:20 +07:00

dwc2_common.h

clean up, add typdef for dwc2 type for device

2024-11-14 17:34:14 +07:00

dwc2_efm32.h

update all dwc2 ports to support new dynamic controller support

2022-06-04 23:52:12 +07:00

dwc2_esp32.h

have p4 dma somewhat working but having issue with buffer that does not occupy the whole cache line

2024-11-20 20:38:20 +07:00

dwc2_gd32.h

update all dwc2 ports to support new dynamic controller support

2022-06-04 23:52:12 +07:00

dwc2_info.md

correctly test dwc2 dma device for s3, disable for p4 (cache issue) and f407 fs (slave only)

2024-11-11 16:42:08 +07:00

dwc2_info.py

correctly test dwc2 dma device for s3, disable for p4 (cache issue) and f407 fs (slave only)

2024-11-11 16:42:08 +07:00

dwc2_stm32.h

Add support for STM32H7RSxx

2024-11-16 12:32:26 +05:30

dwc2_type.h

seperate handle_epin_dma/slave

2024-11-18 12:39:00 +07:00

dwc2_xmc.h

update all dwc2 ports to support new dynamic controller support

2022-06-04 23:52:12 +07:00

hcd_dwc2.c

separate handle out dma and slave

2024-11-18 11:35:46 +07:00