552 lines
19 KiB
C
552 lines
19 KiB
C
/*
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* Copyright(c) 2016 STMicroelectronics
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* Copyright(c) N Conrad
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* Copyright (c) 2019 Ha Thach (tinyusb.org)
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* This file is part of the TinyUSB stack.
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*/
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// This file contains source copied from ST's HAL, and thus should have their copyright statement.
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// FSDEV_PMA_SIZE is PMA buffer size in bytes.
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// On 512-byte devices, access with a stride of two words (use every other 16-bit address)
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// On 1024-byte devices, access with a stride of one word (use every 16-bit address)
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#ifndef PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_
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#define PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_
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#if CFG_TUSB_MCU == OPT_MCU_STM32F0
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#include "stm32f0xx.h"
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#define FSDEV_PMA_SIZE (1024u)
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// F0x2 models are crystal-less
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// All have internal D+ pull-up
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// 070RB: 2 x 16 bits/word memory LPM Support, BCD Support
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// PMA dedicated to USB (no sharing with CAN)
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#elif CFG_TUSB_MCU == OPT_MCU_STM32F1
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#include "stm32f1xx.h"
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#define FSDEV_PMA_SIZE (512u)
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// NO internal Pull-ups
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// *B, and *C: 2 x 16 bits/word
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// F1 names this differently from the rest
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#define USB_CNTR_LPMODE USB_CNTR_LP_MODE
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#elif defined(STM32F302xB) || defined(STM32F302xC) || \
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defined(STM32F303xB) || defined(STM32F303xC) || \
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defined(STM32F373xC)
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#include "stm32f3xx.h"
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#define FSDEV_PMA_SIZE (512u)
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// NO internal Pull-ups
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// *B, and *C: 1 x 16 bits/word
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// PMA dedicated to USB (no sharing with CAN)
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#elif defined(STM32F302x6) || defined(STM32F302x8) || \
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defined(STM32F302xD) || defined(STM32F302xE) || \
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defined(STM32F303xD) || defined(STM32F303xE)
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#include "stm32f3xx.h"
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#define FSDEV_PMA_SIZE (1024u)
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// NO internal Pull-ups
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// *6, *8, *D, and *E: 2 x 16 bits/word LPM Support
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// When CAN clock is enabled, USB can use first 768 bytes ONLY.
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#elif CFG_TUSB_MCU == OPT_MCU_STM32L0
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#include "stm32l0xx.h"
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#define FSDEV_PMA_SIZE (1024u)
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#elif CFG_TUSB_MCU == OPT_MCU_STM32L1
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#include "stm32l1xx.h"
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#define FSDEV_PMA_SIZE (512u)
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#elif CFG_TUSB_MCU == OPT_MCU_STM32G4
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#include "stm32g4xx.h"
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#define FSDEV_PMA_SIZE (1024u)
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#elif CFG_TUSB_MCU == OPT_MCU_STM32G0
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#include "stm32g0xx.h"
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#define FSDEV_BUS_32BIT
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#define FSDEV_PMA_SIZE (2048u)
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#undef USB_PMAADDR
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#define USB_PMAADDR USB_DRD_PMAADDR
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#define USB_TypeDef USB_DRD_TypeDef
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#define EP0R CHEP0R
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#define USB_EP_CTR_RX USB_EP_VTRX
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#define USB_EP_CTR_TX USB_EP_VTTX
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#define USB_EP_T_FIELD USB_CHEP_UTYPE
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#define USB_EPREG_MASK USB_CHEP_REG_MASK
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#define USB_EPTX_DTOGMASK USB_CHEP_TX_DTOGMASK
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#define USB_EPRX_DTOGMASK USB_CHEP_RX_DTOGMASK
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#define USB_EPTX_DTOG1 USB_CHEP_TX_DTOG1
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#define USB_EPTX_DTOG2 USB_CHEP_TX_DTOG2
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#define USB_EPRX_DTOG1 USB_CHEP_RX_DTOG1
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#define USB_EPRX_DTOG2 USB_CHEP_RX_DTOG2
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#define USB_EPRX_STAT USB_CH_RX_VALID
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#define USB_EPKIND_MASK USB_EP_KIND_MASK
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#define USB USB_DRD_FS
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#define USB_CNTR_FRES USB_CNTR_USBRST
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#define USB_CNTR_RESUME USB_CNTR_L2RES
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#define USB_ISTR_EP_ID USB_ISTR_IDN
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#define USB_EPADDR_FIELD USB_CHEP_ADDR
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#define USB_CNTR_LPMODE USB_CNTR_SUSPRDY
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#define USB_CNTR_FSUSP USB_CNTR_SUSPEN
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#elif CFG_TUSB_MCU == OPT_MCU_STM32H5
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#include "stm32h5xx.h"
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#define FSDEV_BUS_32BIT
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#if !defined(USB_DRD_BASE) && defined(USB_DRD_FS_BASE)
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#define USB_DRD_BASE USB_DRD_FS_BASE
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#endif
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#define FSDEV_PMA_SIZE (2048u)
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#undef USB_PMAADDR
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#define USB_PMAADDR USB_DRD_PMAADDR
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#define USB_TypeDef USB_DRD_TypeDef
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#define EP0R CHEP0R
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#define USB_EP_CTR_RX USB_EP_VTRX
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#define USB_EP_CTR_TX USB_EP_VTTX
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#define USB_EP_T_FIELD USB_CHEP_UTYPE
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#define USB_EPREG_MASK USB_CHEP_REG_MASK
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#define USB_EPTX_DTOGMASK USB_CHEP_TX_DTOGMASK
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#define USB_EPRX_DTOGMASK USB_CHEP_RX_DTOGMASK
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#define USB_EPTX_DTOG1 USB_CHEP_TX_DTOG1
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#define USB_EPTX_DTOG2 USB_CHEP_TX_DTOG2
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#define USB_EPRX_DTOG1 USB_CHEP_RX_DTOG1
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#define USB_EPRX_DTOG2 USB_CHEP_RX_DTOG2
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#define USB_EPRX_STAT USB_CH_RX_VALID
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#define USB_EPKIND_MASK USB_EP_KIND_MASK
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#define USB USB_DRD_FS
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#define USB_CNTR_FRES USB_CNTR_USBRST
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#define USB_CNTR_RESUME USB_CNTR_L2RES
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#define USB_ISTR_EP_ID USB_ISTR_IDN
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#define USB_EPADDR_FIELD USB_CHEP_ADDR
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#define USB_CNTR_LPMODE USB_CNTR_SUSPRDY
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#define USB_CNTR_FSUSP USB_CNTR_SUSPEN
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#elif CFG_TUSB_MCU == OPT_MCU_STM32WB
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#include "stm32wbxx.h"
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#define FSDEV_PMA_SIZE (1024u)
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/* ST provided header has incorrect value */
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#undef USB_PMAADDR
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#define USB_PMAADDR USB1_PMAADDR
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#elif CFG_TUSB_MCU == OPT_MCU_STM32L4
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#include "stm32l4xx.h"
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#define FSDEV_PMA_SIZE (1024u)
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#elif CFG_TUSB_MCU == OPT_MCU_STM32L5
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#include "stm32l5xx.h"
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#define FSDEV_PMA_SIZE (1024u)
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#ifndef USB_PMAADDR
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#define USB_PMAADDR (USB_BASE + (USB_PMAADDR_NS - USB_BASE_NS))
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#endif
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#else
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#error You are using an untested or unimplemented STM32 variant. Please update the driver.
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// This includes L1x0, L1x1, L1x2, L4x2 and L4x3, G1x1, G1x3, and G1x4
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#endif
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// For purposes of accessing the packet
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#if ((FSDEV_PMA_SIZE) == 512u)
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#define FSDEV_PMA_STRIDE (2u)
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#elif ((FSDEV_PMA_SIZE) == 1024u)
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#define FSDEV_PMA_STRIDE (1u)
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#endif
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// The fsdev_bus_t type can be used for both register and PMA access necessities
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// For type-safety create a new macro for the volatile address of PMAADDR
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// The compiler should warn us if we cast it to a non-volatile type?
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#ifdef FSDEV_BUS_32BIT
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typedef uint32_t fsdev_bus_t;
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static __IO uint32_t * const pma32 = (__IO uint32_t*)USB_PMAADDR;
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#else
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typedef uint16_t fsdev_bus_t;
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// Volatile is also needed to prevent the optimizer from changing access to 32-bit (as 32-bit access is forbidden)
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static __IO uint16_t * const pma = (__IO uint16_t*)USB_PMAADDR;
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TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t * pcd_btable_word_ptr(USB_TypeDef * USBx, size_t x) {
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size_t total_word_offset = (((USBx)->BTABLE)>>1) + x;
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total_word_offset *= FSDEV_PMA_STRIDE;
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return &(pma[total_word_offset]);
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}
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TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_tx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpIdx) {
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return pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 1u);
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}
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TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_rx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpIdx) {
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return pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 3u);
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}
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#endif
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/* Aligned buffer size according to hardware */
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TU_ATTR_ALWAYS_INLINE static inline uint16_t pcd_aligned_buffer_size(uint16_t size) {
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/* The STM32 full speed USB peripheral supports only a limited set of
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* buffer sizes given by the RX buffer entry format in the USB_BTABLE. */
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uint16_t blocksize = (size > 62) ? 32 : 2;
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// Round up while dividing requested size by blocksize
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uint16_t numblocks = (size + blocksize - 1) / blocksize ;
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return numblocks * blocksize;
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}
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TU_ATTR_ALWAYS_INLINE static inline void pcd_set_endpoint(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wRegValue) {
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#ifdef FSDEV_BUS_32BIT
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(void) USBx;
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__O uint32_t *reg = (__O uint32_t *)(USB_DRD_BASE + bEpIdx*4);
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*reg = wRegValue;
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#else
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__O uint16_t *reg = (__O uint16_t *)((&USBx->EP0R) + bEpIdx*2u);
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*reg = (uint16_t)wRegValue;
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#endif
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}
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TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_endpoint(USB_TypeDef * USBx, uint32_t bEpIdx) {
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#ifdef FSDEV_BUS_32BIT
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(void) USBx;
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__I uint32_t *reg = (__I uint32_t *)(USB_DRD_BASE + bEpIdx*4);
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#else
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__I uint16_t *reg = (__I uint16_t *)((&USBx->EP0R) + bEpIdx*2u);
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#endif
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return *reg;
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}
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TU_ATTR_ALWAYS_INLINE static inline void pcd_set_eptype(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wType) {
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uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
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regVal &= (uint32_t)USB_EP_T_MASK;
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regVal |= wType;
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regVal |= USB_EP_CTR_RX | USB_EP_CTR_TX; // These clear on write0, so must set high
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pcd_set_endpoint(USBx, bEpIdx, regVal);
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}
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TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_eptype(USB_TypeDef * USBx, uint32_t bEpIdx) {
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uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
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regVal &= USB_EP_T_FIELD;
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return regVal;
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}
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/**
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* @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
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* @param USBx USB peripheral instance register address.
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* @param bEpIdx Endpoint Number.
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* @retval None
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*/
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TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_rx_ep_ctr(USB_TypeDef * USBx, uint32_t bEpIdx) {
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uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
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regVal &= USB_EPREG_MASK;
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regVal &= ~USB_EP_CTR_RX;
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regVal |= USB_EP_CTR_TX; // preserve CTR_TX (clears on writing 0)
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pcd_set_endpoint(USBx, bEpIdx, regVal);
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}
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TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_tx_ep_ctr(USB_TypeDef * USBx, uint32_t bEpIdx) {
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uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
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regVal &= USB_EPREG_MASK;
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regVal &= ~USB_EP_CTR_TX;
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regVal |= USB_EP_CTR_RX; // preserve CTR_RX (clears on writing 0)
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pcd_set_endpoint(USBx, bEpIdx,regVal);
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}
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/**
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* @brief gets counter of the tx buffer.
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* @param USBx USB peripheral instance register address.
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* @param bEpIdx Endpoint Number.
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* @retval Counter value
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*/
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TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_tx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx) {
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#ifdef FSDEV_BUS_32BIT
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(void) USBx;
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return (pma32[2*bEpIdx] & 0x03FF0000) >> 16;
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#else
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__I uint16_t *regPtr = pcd_ep_tx_cnt_ptr(USBx, bEpIdx);
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return *regPtr & 0x3ffU;
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#endif
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}
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TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx) {
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#ifdef FSDEV_BUS_32BIT
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(void) USBx;
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return (pma32[2*bEpIdx + 1] & 0x03FF0000) >> 16;
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#else
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__I uint16_t *regPtr = pcd_ep_rx_cnt_ptr(USBx, bEpIdx);
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return *regPtr & 0x3ffU;
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#endif
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}
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#define pcd_get_ep_dbuf0_cnt pcd_get_ep_tx_cnt
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#define pcd_get_ep_dbuf1_cnt pcd_get_ep_rx_cnt
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/**
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* @brief Sets address in an endpoint register.
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* @param USBx USB peripheral instance register address.
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* @param bEpIdx Endpoint Number.
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* @param bAddr Address.
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* @retval None
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*/
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TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_address(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t bAddr) {
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uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
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regVal &= USB_EPREG_MASK;
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regVal |= bAddr;
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regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
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pcd_set_endpoint(USBx, bEpIdx,regVal);
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}
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TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_tx_address(USB_TypeDef * USBx, uint32_t bEpIdx) {
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#ifdef FSDEV_BUS_32BIT
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(void) USBx;
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return pma32[2*bEpIdx] & 0x0000FFFFu ;
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#else
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return *pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 0u);
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#endif
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}
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TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_address(USB_TypeDef * USBx, uint32_t bEpIdx) {
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#ifdef FSDEV_BUS_32BIT
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(void) USBx;
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return pma32[2*bEpIdx + 1] & 0x0000FFFFu;
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#else
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return *pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 2u);
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#endif
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}
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#define pcd_get_ep_dbuf0_address pcd_get_ep_tx_address
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#define pcd_get_ep_dbuf1_address pcd_get_ep_rx_address
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TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_address(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t addr) {
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#ifdef FSDEV_BUS_32BIT
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(void) USBx;
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pma32[2*bEpIdx] = (pma32[2*bEpIdx] & 0xFFFF0000u) | (addr & 0x0000FFFCu);
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#else
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*pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 0u) = addr;
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#endif
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}
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TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_address(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t addr) {
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#ifdef FSDEV_BUS_32BIT
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(void) USBx;
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pma32[2*bEpIdx + 1] = (pma32[2*bEpIdx + 1] & 0xFFFF0000u) | (addr & 0x0000FFFCu);
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#else
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*pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 2u) = addr;
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#endif
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}
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#define pcd_set_ep_dbuf0_address pcd_set_ep_tx_address
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#define pcd_set_ep_dbuf1_address pcd_set_ep_rx_address
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TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wCount) {
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#ifdef FSDEV_BUS_32BIT
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(void) USBx;
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pma32[2*bEpIdx] = (pma32[2*bEpIdx] & ~0x03FF0000u) | ((wCount & 0x3FFu) << 16);
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#else
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__IO uint16_t * reg = pcd_ep_tx_cnt_ptr(USBx, bEpIdx);
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*reg = (uint16_t) (*reg & (uint16_t) ~0x3FFU) | (wCount & 0x3FFU);
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#endif
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}
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#define pcd_set_ep_tx_dbuf0_cnt pcd_set_ep_tx_cnt
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TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_dbuf1_cnt(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wCount) {
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#ifdef FSDEV_BUS_32BIT
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(void) USBx;
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pma32[2*bEpIdx + 1] = (pma32[2*bEpIdx + 1] & ~0x03FF0000u) | ((wCount & 0x3FFu) << 16);
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#else
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__IO uint16_t * reg = pcd_ep_rx_cnt_ptr(USBx, bEpIdx);
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*reg = (uint16_t) (*reg & (uint16_t) ~0x3FFU) | (wCount & 0x3FFU);
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#endif
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}
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TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_blsize_num_blocks(USB_TypeDef * USBx, uint32_t rxtx_idx,
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uint32_t blocksize, uint32_t numblocks) {
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/* Encode into register. When BLSIZE==1, we need to subtract 1 block count */
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#ifdef FSDEV_BUS_32BIT
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(void) USBx;
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pma32[rxtx_idx] = (pma32[rxtx_idx] & 0x0000FFFFu) | (blocksize << 31) | ((numblocks - blocksize) << 26);
|
|
#else
|
|
__IO uint16_t *pdwReg = pcd_btable_word_ptr(USBx, rxtx_idx*2u + 1u);
|
|
*pdwReg = (blocksize << 15) | ((numblocks - blocksize) << 10);
|
|
#endif
|
|
}
|
|
|
|
TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_bufsize(USB_TypeDef * USBx, uint32_t rxtx_idx, uint32_t wCount) {
|
|
wCount = pcd_aligned_buffer_size(wCount);
|
|
|
|
/* We assume that the buffer size is already aligned to hardware requirements. */
|
|
uint16_t blocksize = (wCount > 62) ? 1 : 0;
|
|
uint16_t numblocks = wCount / (blocksize ? 32 : 2);
|
|
|
|
/* There should be no remainder in the above calculation */
|
|
TU_ASSERT((wCount - (numblocks * (blocksize ? 32 : 2))) == 0, /**/);
|
|
|
|
/* Encode into register. When BLSIZE==1, we need to subtract 1 block count */
|
|
pcd_set_ep_blsize_num_blocks(USBx, rxtx_idx, blocksize, numblocks);
|
|
}
|
|
|
|
TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_dbuf0_cnt(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wCount) {
|
|
pcd_set_ep_bufsize(USBx, 2*bEpIdx, wCount);
|
|
}
|
|
|
|
TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wCount) {
|
|
pcd_set_ep_bufsize(USBx, 2*bEpIdx + 1, wCount);
|
|
}
|
|
|
|
#define pcd_set_ep_rx_dbuf1_cnt pcd_set_ep_rx_cnt
|
|
|
|
/**
|
|
* @brief sets the status for tx transfer (bits STAT_TX[1:0]).
|
|
* @param USBx USB peripheral instance register address.
|
|
* @param bEpIdx Endpoint Number.
|
|
* @param wState new state
|
|
* @retval None
|
|
*/
|
|
TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_status(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wState) {
|
|
uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
|
|
regVal &= USB_EPTX_DTOGMASK;
|
|
|
|
/* toggle first bit ? */
|
|
if((USB_EPTX_DTOG1 & (wState))!= 0U)
|
|
{
|
|
regVal ^= USB_EPTX_DTOG1;
|
|
}
|
|
/* toggle second bit ? */
|
|
if((USB_EPTX_DTOG2 & ((uint32_t)(wState)))!= 0U)
|
|
{
|
|
regVal ^= USB_EPTX_DTOG2;
|
|
}
|
|
|
|
regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
|
|
pcd_set_endpoint(USBx, bEpIdx, regVal);
|
|
}
|
|
|
|
/**
|
|
* @brief sets the status for rx transfer (bits STAT_TX[1:0])
|
|
* @param USBx USB peripheral instance register address.
|
|
* @param bEpIdx Endpoint Number.
|
|
* @param wState new state
|
|
* @retval None
|
|
*/
|
|
|
|
TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_status(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wState) {
|
|
uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
|
|
regVal &= USB_EPRX_DTOGMASK;
|
|
|
|
/* toggle first bit ? */
|
|
if((USB_EPRX_DTOG1 & wState)!= 0U) {
|
|
regVal ^= USB_EPRX_DTOG1;
|
|
}
|
|
/* toggle second bit ? */
|
|
if((USB_EPRX_DTOG2 & wState)!= 0U) {
|
|
regVal ^= USB_EPRX_DTOG2;
|
|
}
|
|
|
|
regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
|
|
pcd_set_endpoint(USBx, bEpIdx, regVal);
|
|
}
|
|
|
|
TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_status(USB_TypeDef * USBx, uint32_t bEpIdx) {
|
|
uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
|
|
return (regVal & USB_EPRX_STAT) >> (12u);
|
|
}
|
|
|
|
|
|
/**
|
|
* @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
|
|
* @param USBx USB peripheral instance register address.
|
|
* @param bEpIdx Endpoint Number.
|
|
* @retval None
|
|
*/
|
|
TU_ATTR_ALWAYS_INLINE static inline void pcd_rx_dtog(USB_TypeDef * USBx, uint32_t bEpIdx) {
|
|
uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
|
|
regVal &= USB_EPREG_MASK;
|
|
regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX;
|
|
pcd_set_endpoint(USBx, bEpIdx, regVal);
|
|
}
|
|
|
|
TU_ATTR_ALWAYS_INLINE static inline void pcd_tx_dtog(USB_TypeDef * USBx, uint32_t bEpIdx) {
|
|
uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
|
|
regVal &= USB_EPREG_MASK;
|
|
regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX;
|
|
pcd_set_endpoint(USBx, bEpIdx, regVal);
|
|
}
|
|
|
|
/**
|
|
* @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
|
|
* @param USBx USB peripheral instance register address.
|
|
* @param bEpIdx Endpoint Number.
|
|
* @retval None
|
|
*/
|
|
TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_rx_dtog(USB_TypeDef * USBx, uint32_t bEpIdx) {
|
|
uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
|
|
if((regVal & USB_EP_DTOG_RX) != 0) {
|
|
pcd_rx_dtog(USBx,bEpIdx);
|
|
}
|
|
}
|
|
|
|
TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_tx_dtog(USB_TypeDef * USBx, uint32_t bEpIdx) {
|
|
uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
|
|
if((regVal & USB_EP_DTOG_TX) != 0) {
|
|
pcd_tx_dtog(USBx,bEpIdx);
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief set & clear EP_KIND bit.
|
|
* @param USBx USB peripheral instance register address.
|
|
* @param bEpIdx Endpoint Number.
|
|
* @retval None
|
|
*/
|
|
TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_kind(USB_TypeDef * USBx, uint32_t bEpIdx) {
|
|
uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
|
|
regVal |= USB_EP_KIND;
|
|
regVal &= USB_EPREG_MASK;
|
|
regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
|
|
pcd_set_endpoint(USBx, bEpIdx, regVal);
|
|
}
|
|
|
|
TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_ep_kind(USB_TypeDef * USBx, uint32_t bEpIdx) {
|
|
uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
|
|
regVal &= USB_EPKIND_MASK;
|
|
regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
|
|
pcd_set_endpoint(USBx, bEpIdx, regVal);
|
|
}
|
|
|
|
// This checks if the device has "LPM"
|
|
#if defined(USB_ISTR_L1REQ)
|
|
#define USB_ISTR_L1REQ_FORCED (USB_ISTR_L1REQ)
|
|
#else
|
|
#define USB_ISTR_L1REQ_FORCED ((uint16_t)0x0000U)
|
|
#endif
|
|
|
|
#define USB_ISTR_ALL_EVENTS (USB_ISTR_PMAOVR | USB_ISTR_ERR | USB_ISTR_WKUP | USB_ISTR_SUSP | \
|
|
USB_ISTR_RESET | USB_ISTR_SOF | USB_ISTR_ESOF | USB_ISTR_L1REQ_FORCED )
|
|
|
|
// Number of endpoints in hardware
|
|
// TODO should use TUP_DCD_ENDPOINT_MAX
|
|
#define STFSDEV_EP_COUNT (8u)
|
|
|
|
#endif /* PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_ */
|