8e143fc962
This adds source files that allow to run TinyUSB stack on DA1469x-dk-pro board. Source files .c .S and .ld are taken from Apache Mynewt repository. Those files were stripped to allow starting board without Mynewt os.
137 lines
3.8 KiB
C
137 lines
3.8 KiB
C
/*
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* Licensed to the Apache Software Foundation (ASF) under one
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* or more contributor license agreements. See the NOTICE file
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* distributed with this work for additional information
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* regarding copyright ownership. The ASF licenses this file
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* to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance
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* with the License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing,
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* software distributed under the License is distributed on an
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* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
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* KIND, either express or implied. See the License for the
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* specific language governing permissions and limitations
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* under the License.
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*/
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#include <assert.h>
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#include "syscfg/syscfg.h"
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#include "mcu/da1469x_clock.h"
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#include "mcu/da1469x_lpclk.h"
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#include "mcu/da1469x_pd.h"
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#include "mcu/da1469x_pdc.h"
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#include "mcu/da1469x_prail.h"
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#include "hal/hal_system.h"
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#include "os/os_cputime.h"
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#if !MYNEWT_VAL(BOOT_LOADER)
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static enum hal_reset_reason g_hal_reset_reason;
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#endif
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void
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hal_system_init(void)
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{
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#if MYNEWT_VAL(MCU_DCDC_ENABLE)
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da1469x_prail_dcdc_enable();
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#endif
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/*
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* RESET_STAT_REG has to be cleared to allow HW set bits during next reset
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* so we should read it now and keep result for application to check at any
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* time. This does not happen for bootloader since reading reset reason in
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* bootloader would prevent application from reading it.
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*/
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#if !MYNEWT_VAL(BOOT_LOADER)
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uint32_t reg;
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reg = CRG_TOP->RESET_STAT_REG;
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CRG_TOP->RESET_STAT_REG = 0;
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if (reg & CRG_TOP_RESET_STAT_REG_PORESET_STAT_Msk) {
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g_hal_reset_reason = HAL_RESET_POR;
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} else if (reg & CRG_TOP_RESET_STAT_REG_WDOGRESET_STAT_Msk) {
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g_hal_reset_reason = HAL_RESET_WATCHDOG;
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} else if (reg & CRG_TOP_RESET_STAT_REG_SWRESET_STAT_Msk) {
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g_hal_reset_reason = HAL_RESET_SOFT;
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} else if (reg & CRG_TOP_RESET_STAT_REG_HWRESET_STAT_Msk) {
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g_hal_reset_reason = HAL_RESET_PIN;
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} else {
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g_hal_reset_reason = 0;
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}
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#endif
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}
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void
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hal_system_reset(void)
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{
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#if MYNEWT_VAL(HAL_SYSTEM_RESET_CB)
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hal_system_reset_cb();
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#endif
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while (1) {
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HAL_DEBUG_BREAK();
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CRG_TOP->SYS_CTRL_REG = 0x20;
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NVIC_SystemReset();
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}
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}
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int
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hal_debugger_connected(void)
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{
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return CRG_TOP->SYS_STAT_REG & CRG_TOP_SYS_STAT_REG_DBG_IS_ACTIVE_Msk;
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}
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void
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hal_system_clock_start(void)
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{
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/* Reset clock dividers to 0 */
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CRG_TOP->CLK_AMBA_REG &= ~(CRG_TOP_CLK_AMBA_REG_HCLK_DIV_Msk | CRG_TOP_CLK_AMBA_REG_PCLK_DIV_Msk);
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/* PD_TIM is already started in SystemInit */
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da1469x_clock_sys_xtal32m_init();
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da1469x_clock_sys_xtal32m_enable();
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#if MYNEWT_VAL(MCU_PLL_ENABLE)
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da1469x_clock_sys_pll_enable();
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#endif
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#if MYNEWT_VAL_CHOICE(MCU_SYSCLK_SOURCE, PLL96)
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da1469x_clock_pll_wait_to_lock();
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da1469x_clock_sys_pll_switch();
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#endif
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#if MYNEWT_VAL_CHOICE(MCU_SYSCLK_SOURCE, XTAL32M)
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/* Switch to XTAL32M and disable RC32M */
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da1469x_clock_sys_xtal32m_switch_safe();
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#endif
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da1469x_clock_sys_rc32m_disable();
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#if MYNEWT_VAL_CHOICE(MCU_LPCLK_SOURCE, RCX)
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/* Switch to RCX and calibrate it */
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da1469x_clock_lp_rcx_enable();
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da1469x_clock_lp_rcx_switch();
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da1469x_clock_lp_rcx_calibrate();
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da1469x_lpclk_enabled();
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#else
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/*
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* We cannot switch lp_clk to XTAL32K here since it needs some time to
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* settle, so we just disable RCX (we don't need it) and then we'll handle
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* switch to XTAL32K from sysinit since we need os_cputime for this.
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*/
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da1469x_clock_lp_rcx_disable();
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#endif
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}
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enum hal_reset_reason
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hal_reset_cause(void)
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{
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#if MYNEWT_VAL(BOOT_LOADER)
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return 0;
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#else
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return g_hal_reset_reason;
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#endif
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}
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