109 lines
3.7 KiB
C
109 lines
3.7 KiB
C
/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2024 Ha Thach (tinyusb.org)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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#ifndef TUSB_DWC2_COMMON_H
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#define TUSB_DWC2_COMMON_H
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#include "common/tusb_common.h"
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#include "dwc2_type.h"
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// Following symbols must be defined by port header
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// - _dwc2_controller[]: array of controllers
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// - DWC2_EP_MAX: largest EP counts of all controllers
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// - dwc2_phy_init/dwc2_phy_update: phy init called before and after core reset
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// - dwc2_dcd_int_enable/dwc2_dcd_int_disable
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// - dwc2_remote_wakeup_delay
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#if defined(TUP_USBIP_DWC2_STM32)
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#include "dwc2_stm32.h"
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#elif defined(TUP_USBIP_DWC2_ESP32)
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#include "dwc2_esp32.h"
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#elif TU_CHECK_MCU(OPT_MCU_GD32VF103)
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#include "dwc2_gd32.h"
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#elif TU_CHECK_MCU(OPT_MCU_BCM2711, OPT_MCU_BCM2835, OPT_MCU_BCM2837)
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#include "dwc2_bcm.h"
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#elif TU_CHECK_MCU(OPT_MCU_EFM32GG)
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#include "dwc2_efm32.h"
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#elif TU_CHECK_MCU(OPT_MCU_XMC4000)
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#include "dwc2_xmc.h"
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#else
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#error "Unsupported MCUs"
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#endif
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enum {
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DWC2_CONTROLLER_COUNT = TU_ARRAY_SIZE(_dwc2_controller)
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};
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//------------- Core -------------//
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TU_ATTR_ALWAYS_INLINE static inline dwc2_regs_t* DWC2_REG(uint8_t rhport) {
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if (rhport >= DWC2_CONTROLLER_COUNT) {
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// user mis-configured, ignore and use first controller
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rhport = 0;
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}
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return (dwc2_regs_t*)_dwc2_controller[rhport].reg_base;
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}
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bool dwc2_core_is_highspeed(dwc2_regs_t* dwc2, const tusb_rhport_init_t* rh_init);
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bool dwc2_core_init(uint8_t rhport, const tusb_rhport_init_t* rh_init);
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//------------- DFIFO -------------//
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TU_ATTR_ALWAYS_INLINE static inline void dfifo_flush_tx(dwc2_regs_t* dwc2, uint8_t fnum) {
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// flush TX fifo and wait for it cleared
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dwc2->grstctl = GRSTCTL_TXFFLSH | (fnum << GRSTCTL_TXFNUM_Pos);
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while (dwc2->grstctl & GRSTCTL_TXFFLSH_Msk) {}
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}
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TU_ATTR_ALWAYS_INLINE static inline void dfifo_flush_rx(dwc2_regs_t* dwc2) {
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// flush RX fifo and wait for it cleared
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dwc2->grstctl = GRSTCTL_RXFFLSH;
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while (dwc2->grstctl & GRSTCTL_RXFFLSH_Msk) {}
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}
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//------------- DMA -------------//
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TU_ATTR_ALWAYS_INLINE static inline bool dwc2_dma_enabled(const dwc2_regs_t* dwc2, tusb_role_t role) {
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(void) dwc2;
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if (CFG_TUD_DWC2_DMA == 0 && role == TUSB_ROLE_DEVICE) {
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return false;
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}
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if (CFG_TUH_DWC2_DMA == 0 && role == TUSB_ROLE_HOST) {
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return false;
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}
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// Internal DMA only
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return dwc2->ghwcfg2_bm.arch == GHWCFG2_ARCH_INTERNAL_DMA;
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}
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TU_ATTR_ALWAYS_INLINE static inline uint16_t dma_cal_epfifo_base(uint8_t rhport) {
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// Scatter/Gather DMA mode is not yet supported. Buffer DMA only need 1 words per endpoint direction
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const dwc2_controller_t* dwc2_controller = &_dwc2_controller[rhport];
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return dwc2_controller->ep_fifo_size/4 - 2*dwc2_controller->ep_count;
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}
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#endif
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