233 lines
7.7 KiB
C
233 lines
7.7 KiB
C
/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2019 William D. Jones (thor0505@comcast.net),
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* Ha Thach (tinyusb.org)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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#include "../board.h"
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#include "stm32h7xx.h"
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#include "stm32h7xx_hal_conf.h"
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#define LED_PORT GPIOB
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#define LED_PIN GPIO_PIN_0
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#define BUTTON_PORT GPIOC
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#define BUTTON_PIN GPIO_PIN_13
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/* PWR, RCC, GPIO (All): AHB4 (D3 domain)
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USB{1,2} OTG_{H,F}S: AHB1 (D2 domain)
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*/
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/**
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* @brief System Clock Configuration
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* The system Clock is configured as follows :
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* System Clock source = PLL (HSE)
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* SYSCLK(Hz) = 168000000
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* ACLK(Hz) = 168000000
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* HCLK(Hz) = 168000000
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* AHB1-4 Prescaler = 1
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* APB1 Prescaler (Domain 2) = 2
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* APB2 Prescaler (Domain 2) = 2
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* APB3 Prescaler (Domain 1) = 2
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* APB4 Prescaler (Domain 3) = 2
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* HSE Frequency(Hz) = 8000000
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* PLL1_M = 8
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* PLL1_N = 336
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* PLL1_P = 2
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* PLL1_Q = 7
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* PLL1_R = Unused (TODO: figure out how
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* to gate from HAL?)
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* VDD(V) = 3.3
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* Main regulator output voltage = Scale3 mode
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* Flash Latency(WS) = 4
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* @param None
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* @retval None
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*/
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static void SystemClock_Config(void)
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{
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RCC_ClkInitTypeDef RCC_ClkInitStruct;
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RCC_OscInitTypeDef RCC_OscInitStruct;
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/* The PWR block is always enabled on the H7 series- there is no clock
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enable. For now, use the default VOS3 scale mode (lowest) and limit clock
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frequencies to avoid potential current draw problems from bus
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power when using the max clock speeds throughout the chip. */
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/* Enable HSE Oscillator and activate PLL1 with HSE as source */
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
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RCC_OscInitStruct.CSIState = RCC_CSI_OFF;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = 8;
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RCC_OscInitStruct.PLL.PLLN = 336;
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RCC_OscInitStruct.PLL.PLLP = 2;
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RCC_OscInitStruct.PLL.PLLQ = 7;
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RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_0;
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RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOMEDIUM;
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RCC_OscInitStruct.PLL.PLLFRACN = 0;
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HAL_RCC_OscConfig(&RCC_OscInitStruct);
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RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | \
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RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | \
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RCC_CLOCKTYPE_D3PCLK1);
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1;
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/* Unlike on the STM32F4 family, it appears the maximum APB frequencies are
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device-dependent- 120 MHz for this board according to Figure 2 of
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the datasheet. Dividing by half will be safe for now. */
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RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
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RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
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/* 4 wait states required for 168MHz and VOS3. */
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HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
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/* Like on F4, on H7, USB's actual peripheral clock and bus clock are
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separate. However, the main system PLL (PLL1) doesn't have a direct
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connection to the USB peripheral clock to generate 48 MHz, so we do this
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dance. This will connect PLL1's Q output to the USB peripheral clock. */
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RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct;
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RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
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RCC_PeriphCLKInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL;
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HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInitStruct);
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}
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void board_init(void)
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{
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#if CFG_TUSB_OS == OPT_OS_NONE
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// 1ms tick timer
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SysTick_Config(SystemCoreClock / 1000);
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#endif
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SystemClock_Config();
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SystemCoreClockUpdate();
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GPIO_InitTypeDef GPIO_InitStruct;
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// USB Pin Init
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// PA9- VUSB, PA10- ID, PA11- DM, PA12- DP
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__HAL_RCC_GPIOA_CLK_ENABLE();
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/* Configure DM DP Pins */
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GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Alternate = GPIO_AF10_OTG2_HS;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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/* Configure VBUS Pin */
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GPIO_InitStruct.Pin = GPIO_PIN_9;
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GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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/* This for ID line debug */
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GPIO_InitStruct.Pin = GPIO_PIN_10;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
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GPIO_InitStruct.Pull = GPIO_PULLUP;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF10_OTG2_HS;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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// LED
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__HAL_RCC_GPIOB_CLK_ENABLE();
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GPIO_InitStruct.Pin = LED_PIN;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStruct.Pull = GPIO_PULLUP;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct);
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// Button
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__HAL_RCC_GPIOC_CLK_ENABLE();
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GPIO_InitStruct.Pin = BUTTON_PIN;
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GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
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// https://community.st.com/s/question/0D50X00009XkYZLSA3/stm32h7-nucleo-usb-fs-cdc
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// TODO: Board init actually works fine without this line.
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HAL_PWREx_EnableUSBVoltageDetector();
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__HAL_RCC_USB2_OTG_FS_CLK_ENABLE();
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}
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//--------------------------------------------------------------------+
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// Board porting API
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//--------------------------------------------------------------------+
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void board_led_write(bool state)
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{
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HAL_GPIO_WritePin(LED_PORT, LED_PIN, state);
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}
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uint32_t board_button_read(void)
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{
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return HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
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}
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int board_uart_read(uint8_t* buf, int len)
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{
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return 0;
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}
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int board_uart_write(void const * buf, int len)
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{
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return 0;
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}
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#if CFG_TUSB_OS == OPT_OS_NONE
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volatile uint32_t system_ticks = 0;
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void SysTick_Handler (void)
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{
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system_ticks++;
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}
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uint32_t board_millis(void)
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{
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return system_ticks;
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}
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#endif
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void HardFault_Handler (void)
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{
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asm("bkpt");
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}
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// Required by __libc_init_array in startup code if we are compiling using
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// -nostdlib/-nostartfiles.
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void _init(void)
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{
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}
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