501 lines
		
	
	
		
			17 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			501 lines
		
	
	
		
			17 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| //*****************************************************************************
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| //   +--+       
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| //   | ++----+   
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| //   +-++    |  
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| //     |     |  
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| //   +-+--+  |   
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| //   | +--+--+  
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| //   +----+    Copyright (c) 2011-12 Code Red Technologies Ltd.
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| //
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| // LPC43xx Microcontroller Startup code for use with Red Suite
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| //
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| // Version : 120430
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| //
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| // Software License Agreement
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| // 
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| // The software is owned by Code Red Technologies and/or its suppliers, and is
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| // protected under applicable copyright laws.  All rights are reserved.  Any 
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| // use in violation of the foregoing restrictions may subject the user to criminal 
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| // sanctions under applicable laws, as well as to civil liability for the breach 
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| // of the terms and conditions of this license.
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| // 
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| // THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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| // OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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| // MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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| // USE OF THIS SOFTWARE FOR COMMERCIAL DEVELOPMENT AND/OR EDUCATION IS SUBJECT
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| // TO A CURRENT END USER LICENSE AGREEMENT (COMMERCIAL OR EDUCATIONAL) WITH
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| // CODE RED TECHNOLOGIES LTD. 
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| //
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| //*****************************************************************************
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| #if defined (__cplusplus)
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| #ifdef __REDLIB__
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| #error Redlib does not support C++
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| #else
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| //*****************************************************************************
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| //
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| // The entry point for the C++ library startup
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| //
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| //*****************************************************************************
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| extern "C" {
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| 	extern void __libc_init_array(void);
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| }
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| #endif
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| #endif
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| 
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| #define WEAK __attribute__ ((weak))
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| #define ALIAS(f) __attribute__ ((weak, alias (#f)))
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| 
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| // Code Red - if CMSIS is being used, then SystemInit() routine
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| // will be called by startup code rather than in application's main()
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| #if defined (__USE_CMSIS)
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| #include "LPC43xx.h"
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| #endif
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| 
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| //*****************************************************************************
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| #if defined (__cplusplus)
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| extern "C" {
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| #endif
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| 
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| //*****************************************************************************
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| //
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| // Forward declaration of the default handlers. These are aliased.
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| // When the application defines a handler (with the same name), this will 
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| // automatically take precedence over these weak definitions
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| //
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| //*****************************************************************************
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|      void ResetISR(void);
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| WEAK void NMI_Handler(void);
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| WEAK void HardFault_Handler(void);
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| WEAK void MemManage_Handler(void);
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| WEAK void BusFault_Handler(void);
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| WEAK void UsageFault_Handler(void);
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| WEAK void SVC_Handler(void);
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| WEAK void DebugMon_Handler(void);
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| WEAK void PendSV_Handler(void);
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| WEAK void SysTick_Handler(void);
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| WEAK void IntDefaultHandler(void);
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| 
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| //*****************************************************************************
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| //
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| // Forward declaration of the specific IRQ handlers. These are aliased
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| // to the IntDefaultHandler, which is a 'forever' loop. When the application
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| // defines a handler (with the same name), this will automatically take 
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| // precedence over these weak definitions
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| //
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| //*****************************************************************************
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| void DAC_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void M0CORE_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void DMA_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void EZH_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void FLASH_EEPROM_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void ETH_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void SDIO_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void LCD_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void USB0_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void USB1_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void SCT_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void RIT_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void TIMER0_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void TIMER1_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void TIMER2_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void TIMER3_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void MCPWM_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void ADC0_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void SPI_IRQHandler (void) ALIAS(IntDefaultHandler);
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| void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void ADC1_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void UART0_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void UART1_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void UART2_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void UART3_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void I2S0_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void I2S1_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void SPIFI_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void SGPIO_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void GPIO0_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void GPIO1_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void GPIO2_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void GPIO3_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void GPIO4_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void GPIO5_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void GPIO6_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void GPIO7_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void GINT0_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void GINT1_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void EVRT_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void CAN1_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void VADC_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void ATIMER_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void RTC_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void WDT_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void M0s_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void CAN0_IRQHandler(void) ALIAS(IntDefaultHandler);
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| void QEI_IRQHandler(void) ALIAS(IntDefaultHandler);
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| 
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| 
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| //*****************************************************************************
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| //
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| // The entry point for the application.
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| // __main() is the entry point for Redlib based applications
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| // main() is the entry point for Newlib based applications
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| //
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| //*****************************************************************************
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| #if defined (__REDLIB__)
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| extern void __main(void);
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| #endif
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| extern int main(void);
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| //*****************************************************************************
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| //
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| // External declaration for the pointer to the stack top from the Linker Script
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| //
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| //*****************************************************************************
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| extern void _vStackTop(void);
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| 
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| //*****************************************************************************
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| #if defined (__cplusplus)
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| } // extern "C"
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| #endif
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| //*****************************************************************************
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| //
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| // The vector table.
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| // This relies on the linker script to place at correct location in memory.
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| //
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| //*****************************************************************************
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| extern void (* const g_pfnVectors[])(void);
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| __attribute__ ((section(".isr_vector")))
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| void (* const g_pfnVectors[])(void) = {
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| 		// Core Level - CM4
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| 		&_vStackTop, // The initial stack pointer
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| 		ResetISR,								// The reset handler
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| 		NMI_Handler,							// The NMI handler
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| 		HardFault_Handler,						// The hard fault handler
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| 		MemManage_Handler,						// The MPU fault handler
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| 		BusFault_Handler,						// The bus fault handler
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| 		UsageFault_Handler,						// The usage fault handler
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| 		0,										// Reserved
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| 		0,										// Reserved
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| 		0,										// Reserved
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| 		0,										// Reserved
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| 		SVC_Handler,							// SVCall handler
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| 		DebugMon_Handler,						// Debug monitor handler
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| 		0,										// Reserved
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| 		PendSV_Handler,							// The PendSV handler
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| 		SysTick_Handler,						// The SysTick handler
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| 
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| 		// Chip Level - LPC43
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| 		DAC_IRQHandler,	 			// 16
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| 		M0CORE_IRQHandler,			// 17
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| 		DMA_IRQHandler,				// 18
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| 		EZH_IRQHandler,				// 19
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| 		FLASH_EEPROM_IRQHandler,	// 20
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| 		ETH_IRQHandler,				// 21
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| 		SDIO_IRQHandler,			// 22
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| 		LCD_IRQHandler,				// 23
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| 		USB0_IRQHandler,			// 24
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| 		USB1_IRQHandler,			// 25
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| 		SCT_IRQHandler,				// 26
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| 		RIT_IRQHandler,				// 27
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| 		TIMER0_IRQHandler,			// 28
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| 		TIMER1_IRQHandler,			// 29
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| 		TIMER2_IRQHandler,			// 30
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| 		TIMER3_IRQHandler,			// 31
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| 		MCPWM_IRQHandler,			// 32
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| 		ADC0_IRQHandler,			// 33
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| 		I2C0_IRQHandler,			// 34
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| 		I2C1_IRQHandler,			// 35
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| 		SPI_IRQHandler,				// 36
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| 		ADC1_IRQHandler,			// 37
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| 		SSP0_IRQHandler,			// 38
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| 		SSP1_IRQHandler,			// 39
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| 		UART0_IRQHandler,			// 40
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| 		UART1_IRQHandler,			// 41
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| 		UART2_IRQHandler,			// 42
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| 		UART3_IRQHandler,			// 43
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| 		I2S0_IRQHandler,			// 44
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| 		I2S1_IRQHandler,			// 45
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| 		SPIFI_IRQHandler,			// 46
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| 		SGPIO_IRQHandler,			// 47
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| 		GPIO0_IRQHandler,			// 48
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| 		GPIO1_IRQHandler,			// 49
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| 		GPIO2_IRQHandler,			// 50
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| 		GPIO3_IRQHandler,			// 51
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| 		GPIO4_IRQHandler,			// 52
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| 		GPIO5_IRQHandler,			// 53
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| 		GPIO6_IRQHandler,			// 54
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| 		GPIO7_IRQHandler,			// 55
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| 		GINT0_IRQHandler,			// 56
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| 		GINT1_IRQHandler,			// 57
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| 		EVRT_IRQHandler,			// 58
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| 		CAN1_IRQHandler,			// 59
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| 		0,							// 60
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| 		VADC_IRQHandler,			// 61
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| 		ATIMER_IRQHandler,			// 62
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| 		RTC_IRQHandler,				// 63
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| 		0,							// 64
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| 		WDT_IRQHandler,				// 65
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| 		M0s_IRQHandler,				// 66
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| 		CAN0_IRQHandler,			// 67
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| 		QEI_IRQHandler,				// 68
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| 	};
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| 
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| //*****************************************************************************
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| // Functions to carry out the initialization of RW and BSS data sections. These
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| // are written as separate functions rather than being inlined within the
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| // ResetISR() function in order to cope with MCUs with multiple banks of
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| // memory.
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| //*****************************************************************************
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| __attribute__ ((section(".after_vectors")))
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| void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
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| 	unsigned int *pulDest = (unsigned int*) start;
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| 	unsigned int *pulSrc = (unsigned int*) romstart;
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| 	unsigned int loop;
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| 	for (loop = 0; loop < len; loop = loop + 4)
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| 		*pulDest++ = *pulSrc++;
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| }
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| 
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| __attribute__ ((section(".after_vectors")))
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| void bss_init(unsigned int start, unsigned int len) {
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| 	unsigned int *pulDest = (unsigned int*) start;
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| 	unsigned int loop;
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| 	for (loop = 0; loop < len; loop = loop + 4)
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| 		*pulDest++ = 0;
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| }
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| 
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| //*****************************************************************************
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| // The following symbols are constructs generated by the linker, indicating
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| // the location of various points in the "Global Section Table". This table is
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| // created by the linker via the Code Red managed linker script mechanism. It
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| // contains the load address, execution address and length of each RW data
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| // section and the execution and length of each BSS (zero initialized) section.
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| //*****************************************************************************
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| extern unsigned int __data_section_table;
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| extern unsigned int __data_section_table_end;
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| extern unsigned int __bss_section_table;
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| extern unsigned int __bss_section_table_end;
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| 
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| //*****************************************************************************
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| // Reset entry point for your code.
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| // Sets up a simple runtime environment and initializes the C/C++
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| // library.
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| //
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| //*****************************************************************************
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| void
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| ResetISR(void) {
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| 
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| // *************************************************************
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| // The following conditional block of code manually resets as
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| // much of the peripheral set of the LPC43 as possible. This is
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| // done because the LPC43 does not provide a means of triggering
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| // a full system reset under debugger control, which can cause
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| // problems in certain circumstances when debugging.
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| //
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| // You can prevent this code block being included if you require
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| // (for example when creating a final executable which you will
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| // not debug) by setting the define 'DONT_RESET_ON_RESTART'.
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| //
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| #ifndef DONT_RESET_ON_RESTART
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| 
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| 	// Disable interrupts
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| 	__asm volatile ("cpsid i");
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| 	// equivalent to CMSIS '__disable_irq()' function
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| 
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| 	unsigned int *RESET_CONTROL = (unsigned int *) 0x40053100;
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| 	// LPC_RGU->RESET_CTRL0 @ 0x40053100
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| 	// LPC_RGU->RESET_CTRL1 @ 0x40053104
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| 	// Note that we do not use the CMSIS register access mechanism,
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| 	// as there is no guarantee that the project has been configured
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| 	// to use CMSIS.
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| 
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| 	// Write to LPC_RGU->RESET_CTRL0
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| 	*(RESET_CONTROL+0) = 0x10DF0000;
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| 	// GPIO_RST|AES_RST|ETHERNET_RST|SDIO_RST|DMA_RST|
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| 	// USB1_RST|USB0_RST|LCD_RST
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| 
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| 	// Write to LPC_RGU->RESET_CTRL1
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| 	*(RESET_CONTROL+1) = 0x01DFF7FF;
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| 	// M0APP_RST|CAN0_RST|CAN1_RST|I2S_RST|SSP1_RST|SSP0_RST|
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| 	// I2C1_RST|I2C0_RST|UART3_RST|UART1_RST|UART1_RST|UART0_RST|
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| 	// DAC_RST|ADC1_RST|ADC0_RST|QEI_RST|MOTOCONPWM_RST|SCT_RST|
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| 	// RITIMER_RST|TIMER3_RST|TIMER2_RST|TIMER1_RST|TIMER0_RST
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| 
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| 	// Clear all pending interrupts in the NVIC
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| 	volatile unsigned int *NVIC_ICPR = (unsigned int *) 0xE000E280;
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| 	unsigned int irqpendloop;
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| 	for (irqpendloop = 0; irqpendloop < 8; irqpendloop++) {
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| 		*(NVIC_ICPR+irqpendloop)= 0xFFFFFFFF;
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| 	}
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| 
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| 	// Reenable interrupts
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| 	__asm volatile ("cpsie i");
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| 	// equivalent to CMSIS '__enable_irq()' function
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| 
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| #endif  // ifndef DONT_RESET_ON_RESTART
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| // *************************************************************
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| 
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| 
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|     //
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|     // Copy the data sections from flash to SRAM.
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|     //
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| 	unsigned int LoadAddr, ExeAddr, SectionLen;
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| 	unsigned int *SectionTableAddr;
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| 
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| 	// Load base address of Global Section Table
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| 	SectionTableAddr = &__data_section_table;
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| 
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|     // Copy the data sections from flash to SRAM.
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| 	while (SectionTableAddr < &__data_section_table_end) {
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| 		LoadAddr = *SectionTableAddr++;
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| 		ExeAddr = *SectionTableAddr++;
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| 		SectionLen = *SectionTableAddr++;
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| 		data_init(LoadAddr, ExeAddr, SectionLen);
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| 	}
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| 	// At this point, SectionTableAddr = &__bss_section_table;
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| 	// Zero fill the bss segment
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| 	while (SectionTableAddr < &__bss_section_table_end) {
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| 		ExeAddr = *SectionTableAddr++;
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| 		SectionLen = *SectionTableAddr++;
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| 		bss_init(ExeAddr, SectionLen);
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| 	}
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| 
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| #if defined (__VFP_FP__) && !defined (__SOFTFP__)
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| /*
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|  * Code to enable the Cortex-M4 FPU only included
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|  * if appropriate build options have been selected.
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|  * Code taken from Section 7.1, Cortex-M4 TRM (DDI0439C)
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|  */
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| 	  // CPACR is located at address 0xE000ED88
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| 	asm("LDR.W R0, =0xE000ED88");
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| 	  // Read CPACR
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| 	asm("LDR R1, [R0]");
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| 	  // Set bits 20-23 to enable CP10 and CP11 coprocessors
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| 	asm(" ORR R1, R1, #(0xF << 20)");
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| 	  // Write back the modified value to the CPACR
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| 	asm("STR R1, [R0]");
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| #endif // (__VFP_FP__) && !(__SOFTFP__)
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| 
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| 	// ******************************
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| 	// Check to see if we are running the code from a non-zero
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|     // address (eg RAM, external flash), in which case we need
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|     // to modify the VTOR register to tell the CPU that the
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|     // vector table is located at a non-0x0 address.
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| 
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| 	// Note that we do not use the CMSIS register access mechanism,
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| 	// as there is no guarantee that the project has been configured
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| 	// to use CMSIS.
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| 	unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
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| 	if ((unsigned int *)g_pfnVectors!=(unsigned int *) 0x00000000) {
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| 		// CMSIS : SCB->VTOR = <address of vector table>
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| 		*pSCB_VTOR = (unsigned int)g_pfnVectors;
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| 	}
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| 
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| #ifdef __USE_CMSIS
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| 	SystemInit();
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| #endif
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| 
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| #if defined (__cplusplus)
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| 	//
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| 	// Call C++ library initialisation
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| 	//
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| 	__libc_init_array();
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| #endif
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| 
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| #if defined (__REDLIB__)
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| 	// Call the Redlib library, which in turn calls main()
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| 	__main() ;
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| #else
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| 	main();
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| #endif
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| 
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| 	//
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| 	// main() shouldn't return, but if it does, we'll just enter an infinite loop 
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| 	//
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| 	while (1) {
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| 		;
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| 	}
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| }
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| 
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| //*****************************************************************************
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| // Default exception handlers. Override the ones here by defining your own
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| // handler routines in your application code.
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| //*****************************************************************************
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| __attribute__ ((section(".after_vectors")))
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| void NMI_Handler(void)
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| {
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|     while(1)
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|     {
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|     }
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| }
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| __attribute__ ((section(".after_vectors")))
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| void HardFault_Handler(void)
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| {
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|     while(1)
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|     {
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|     }
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| }
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| __attribute__ ((section(".after_vectors")))
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| void MemManage_Handler(void)
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| {
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|     while(1)
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|     {
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|     }
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| }
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| __attribute__ ((section(".after_vectors")))
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| void BusFault_Handler(void)
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| {
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|     while(1)
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|     {
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|     }
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| }
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| __attribute__ ((section(".after_vectors")))
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| void UsageFault_Handler(void)
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| {
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|     while(1)
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|     {
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|     }
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| }
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| __attribute__ ((section(".after_vectors")))
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| void SVC_Handler(void)
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| {
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|     while(1)
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|     {
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|     }
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| }
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| __attribute__ ((section(".after_vectors")))
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| void DebugMon_Handler(void)
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| {
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|     while(1)
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|     {
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|     }
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| }
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| __attribute__ ((section(".after_vectors")))
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| void PendSV_Handler(void)
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| {
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|     while(1)
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|     {
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|     }
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| }
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| __attribute__ ((section(".after_vectors")))
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| void SysTick_Handler(void)
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| {
 | |
|     while(1)
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|     {
 | |
|     }
 | |
| }
 | |
| 
 | |
| //*****************************************************************************
 | |
| //
 | |
| // Processor ends up here if an unexpected interrupt occurs or a specific
 | |
| // handler is not present in the application code.
 | |
| //
 | |
| //*****************************************************************************
 | |
| __attribute__ ((section(".after_vectors")))
 | |
| void IntDefaultHandler(void)
 | |
| {
 | |
|     while(1)
 | |
|     {
 | |
|     }
 | |
| }
 | 
