291 lines
10 KiB
C
291 lines
10 KiB
C
/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021, Ha Thach (tinyusb.org)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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#ifndef BOARD_H_
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#define BOARD_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "mfxstm32l152.h"
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#define LED_PORT GPIOA
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#define LED_PIN GPIO_PIN_4
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#define LED_STATE_ON 1
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// Tamper push-button
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#define BUTTON_PORT GPIOC
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#define BUTTON_PIN GPIO_PIN_13
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#define BUTTON_STATE_ACTIVE 0
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// Need to change jumper setting J7 and J8 from RS-232 to STLink
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#define UART_DEV USART1
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#define UART_CLK_EN __HAL_RCC_USART1_CLK_ENABLE
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#define UART_GPIO_PORT GPIOB
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#define UART_GPIO_AF GPIO_AF4_USART1
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#define UART_TX_PIN GPIO_PIN_14
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#define UART_RX_PIN GPIO_PIN_15
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// VBUS Sense detection
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#define OTG_FS_VBUS_SENSE 1
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#define OTG_HS_VBUS_SENSE 0
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// USB HS External PHY Pin: CLK, STP, DIR, NXT, D0-D7
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#define ULPI_PINS \
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{GPIOA, GPIO_PIN_3 }, {GPIOA, GPIO_PIN_5 }, {GPIOB, GPIO_PIN_0 }, {GPIOB, GPIO_PIN_1 }, \
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{GPIOB, GPIO_PIN_5 }, {GPIOB, GPIO_PIN_10}, {GPIOB, GPIO_PIN_11}, {GPIOB, GPIO_PIN_12}, \
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{GPIOB, GPIO_PIN_13}, {GPIOC, GPIO_PIN_0 }, {GPIOH, GPIO_PIN_4 }, {GPIOI, GPIO_PIN_11}
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/* Definition for I2C1 Pins */
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#define BUS_I2C1_SCL_PIN GPIO_PIN_6
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#define BUS_I2C1_SDA_PIN GPIO_PIN_7
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#define BUS_I2C1_SCL_GPIO_PORT GPIOB
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#define BUS_I2C1_SDA_GPIO_PORT GPIOB
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#define BUS_I2C1_SCL_AF GPIO_AF4_I2C1
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#define BUS_I2C1_SDA_AF GPIO_AF4_I2C1
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//--------------------------------------------------------------------+
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// RCC Clock
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//--------------------------------------------------------------------+
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static inline void SystemClock_Config(void) {
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RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
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RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 };
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/*!< Supply configuration update enable */
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HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
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/* The voltage scaling allows optimizing the power consumption when the device is
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clocked below the maximum system frequency, to update the voltage scaling value
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regarding system frequency refer to product datasheet. */
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
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while ( (PWR->D3CR & (PWR_D3CR_VOSRDY)) != PWR_D3CR_VOSRDY ) {}
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/* Enable HSE Oscillator and activate PLL with HSE as source */
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
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RCC_OscInitStruct.CSIState = RCC_CSI_OFF;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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// PLL1 for System Clock (400Mhz)
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// From H743 eval manual ETM can only work at 50 MHz clock by default because ETM signals
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// are shared with other peripherals. Trace CLK = PLL1R.
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RCC_OscInitStruct.PLL.PLLM = 5;
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RCC_OscInitStruct.PLL.PLLN = 160;
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RCC_OscInitStruct.PLL.PLLP = 2;
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RCC_OscInitStruct.PLL.PLLQ = 4;
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RCC_OscInitStruct.PLL.PLLR = 6; // Trace clock is 400/6 = 66.67 MHz (larger than 50 MHz but work well)
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RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOMEDIUM;
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RCC_OscInitStruct.PLL.PLLFRACN = 0;
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RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
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HAL_RCC_OscConfig(&RCC_OscInitStruct);
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/* Select PLL as system clock source and configure bus clocks dividers */
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 |
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RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_D3PCLK1;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
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RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
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HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
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/* PLL3 for USB Clock */
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PeriphClkInitStruct.PLL3.PLL3M = 25;
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PeriphClkInitStruct.PLL3.PLL3N = 336;
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PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
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PeriphClkInitStruct.PLL3.PLL3P = 2;
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PeriphClkInitStruct.PLL3.PLL3Q = 7;
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PeriphClkInitStruct.PLL3.PLL3R = 2;
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
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PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3;
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HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
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/*activate CSI clock mondatory for I/O Compensation Cell*/
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__HAL_RCC_CSI_ENABLE();
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/* Enable SYSCFG clock mondatory for I/O Compensation Cell */
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__HAL_RCC_SYSCFG_CLK_ENABLE();
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/* Enables the I/O Compensation Cell */
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HAL_EnableCompensationCell();
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}
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//--------------------------------------------------------------------+
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// MFX
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//--------------------------------------------------------------------+
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I2C_HandleTypeDef hbus_i2c1 = { .Instance = I2C1};
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static MFXSTM32L152_Object_t mfx_obj = { 0 };
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static MFXSTM32L152_IO_Mode_t* mfx_io_drv = NULL;
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HAL_StatusTypeDef MX_I2C1_Init(I2C_HandleTypeDef* hI2c, uint32_t timing) {
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hI2c->Init.Timing = timing;
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hI2c->Init.OwnAddress1 = 0;
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hI2c->Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
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hI2c->Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
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hI2c->Init.OwnAddress2 = 0;
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hI2c->Init.OwnAddress2Masks = I2C_OA2_NOMASK;
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hI2c->Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
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hI2c->Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
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if (HAL_I2C_Init(hI2c) != HAL_OK) {
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return HAL_ERROR;
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}
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if (HAL_I2CEx_ConfigAnalogFilter(hI2c, I2C_ANALOGFILTER_ENABLE) != HAL_OK) {
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return HAL_ERROR;
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}
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if (HAL_I2CEx_ConfigDigitalFilter(hI2c, 0) != HAL_OK) {
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return HAL_ERROR;
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}
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return HAL_OK;
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}
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int32_t BSP_I2C1_Init(void) {
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// Init I2C
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GPIO_InitTypeDef gpio_init_structure;
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gpio_init_structure.Pin = BUS_I2C1_SCL_PIN;
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gpio_init_structure.Mode = GPIO_MODE_AF_OD;
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gpio_init_structure.Pull = GPIO_NOPULL;
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gpio_init_structure.Speed = GPIO_SPEED_FREQ_HIGH;
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gpio_init_structure.Alternate = BUS_I2C1_SCL_AF;
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HAL_GPIO_Init(BUS_I2C1_SCL_GPIO_PORT, &gpio_init_structure);
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gpio_init_structure.Pin = BUS_I2C1_SDA_PIN;
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gpio_init_structure.Mode = GPIO_MODE_AF_OD;
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gpio_init_structure.Pull = GPIO_NOPULL;
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gpio_init_structure.Speed = GPIO_SPEED_FREQ_HIGH;
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gpio_init_structure.Alternate = BUS_I2C1_SDA_AF;
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HAL_GPIO_Init(BUS_I2C1_SDA_GPIO_PORT, &gpio_init_structure);
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__HAL_RCC_I2C1_CLK_ENABLE();
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__HAL_RCC_I2C1_FORCE_RESET();
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__HAL_RCC_I2C1_RELEASE_RESET();
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if (MX_I2C1_Init(&hbus_i2c1, /*0x10C0ECFF*/ 1890596921) != HAL_OK) {
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return -1;
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}
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return 0;
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}
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int32_t BSP_I2C1_DeInit(void) {
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return 0;
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}
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int32_t BSP_I2C1_ReadReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length) {
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if (HAL_OK != HAL_I2C_Mem_Read(&hbus_i2c1, DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length, 10000)) {
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return -1;
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}
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return 0;
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}
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int32_t BSP_I2C1_WriteReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length) {
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if(HAL_OK != HAL_I2C_Mem_Write(&hbus_i2c1, DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length, 10000)) {
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return -1;
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}
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return 0;
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}
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static inline void board_init2(void) {
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// Init MFX IO expanding for vbus drive
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BSP_I2C1_Init();
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/* Configure the audio driver */
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MFXSTM32L152_IO_t IOCtx;
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IOCtx.Init = BSP_I2C1_DeInit;
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IOCtx.DeInit = BSP_I2C1_DeInit;
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IOCtx.ReadReg = BSP_I2C1_ReadReg;
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IOCtx.WriteReg = BSP_I2C1_WriteReg;
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IOCtx.GetTick = (MFXSTM32L152_GetTick_Func) HAL_GetTick;
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uint8_t i2c_address[] = {0x84, 0x86};
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for(uint8_t i = 0U; i < 2U; i++) {
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uint32_t mfx_id;
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IOCtx.Address = (uint16_t)i2c_address[i];
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if (MFXSTM32L152_RegisterBusIO(&mfx_obj, &IOCtx) != MFXSTM32L152_OK) {
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return;
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}
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if (MFXSTM32L152_ReadID(&mfx_obj, &mfx_id) != MFXSTM32L152_OK) {
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return;
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}
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if ((mfx_id == MFXSTM32L152_ID) || (mfx_id == MFXSTM32L152_ID_2)) {
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if (MFXSTM32L152_Init(&mfx_obj) != MFXSTM32L152_OK) {
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return;
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}
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break;
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}
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}
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mfx_io_drv = &MFXSTM32L152_IO_Driver;
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static MFXSTM32L152_IO_Init_t io_init = { 0 };
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mfx_io_drv->Init(&mfx_obj, &io_init);
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io_init.Pin = MFXSTM32L152_GPIO_PIN_7;
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io_init.Mode = MFXSTM32L152_GPIO_MODE_OUTPUT_PP;
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io_init.Pull = MFXSTM32L152_GPIO_PULLUP;
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mfx_io_drv->Init(&mfx_obj, &io_init); // VBUS[0]
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io_init.Pin = MFXSTM32L152_GPIO_PIN_9;
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mfx_io_drv->Init(&mfx_obj, &io_init); // VBUS[1]
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#if 1 // write then read IO7 but it does not seems to change value
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int32_t pin_value;
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pin_value = mfx_io_drv->IO_ReadPin(&mfx_obj, MFXSTM32L152_GPIO_PIN_7);
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TU_LOG1_INT(pin_value);
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mfx_io_drv->IO_WritePin(&mfx_obj, MFXSTM32L152_GPIO_PIN_7, 1);
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pin_value = mfx_io_drv->IO_ReadPin(&mfx_obj, MFXSTM32L152_GPIO_PIN_7);
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TU_LOG1_INT(pin_value);
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#endif
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}
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// vbus drive
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void board_vbus_set(uint8_t rhport, bool state) {
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if ( mfx_io_drv ) {
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uint32_t io_pin = (_rhport) ? MFXSTM32L152_GPIO_PIN_9 : MFXSTM32L152_GPIO_PIN_7;
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mfx_io_drv->IO_WritePin(&Io_CompObj, io_pin, _on);
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}
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}
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#ifdef __cplusplus
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}
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#endif
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#endif
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