598 lines
15 KiB
C
598 lines
15 KiB
C
/**************************************************************************/
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/*!
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@file dcd_nrf5x.c
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@author hathach
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@section LICENSE
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Software License Agreement (BSD License)
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Copyright (c) 2018, hathach (tinyusb.org)
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the copyright holders nor the
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names of its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
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EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
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DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**************************************************************************/
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#include "tusb_option.h"
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#if MODE_DEVICE_SUPPORTED && CFG_TUSB_MCU == OPT_MCU_NRF5X
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// TODO remove
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#include "nrf.h"
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#include "nrf_power.h"
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#include "nrf_usbd.h"
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#include "nrf_clock.h"
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#include "nrf_drv_usbd_errata.h"
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#include "device/dcd.h"
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#define ERRATA_104_FIX 0
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/*------------------------------------------------------------------*/
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/* MACRO TYPEDEF CONSTANT ENUM
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*------------------------------------------------------------------*/
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enum
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{
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// Max allowed by USB specs
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MAX_PACKET_SIZE = 64,
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// Mask of all END event (IN & OUT) for all endpoints. ENDEPIN0-7, ENDEPOUT0-7, ENDISOIN, ENDISOOUT
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EDPT_END_ALL_MASK = 0x1FFBFCUL
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};
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/*------------------------------------------------------------------*/
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/* VARIABLE DECLARATION
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*------------------------------------------------------------------*/
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typedef struct
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{
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uint8_t* buffer;
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uint16_t total_len;
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uint16_t actual_len;
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uint8_t mps; // max packet size
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#if ERRATA_104_FIX
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// FIXME Errata 104 walkaround
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uint16_t frame_num;
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uint8_t prev_size;
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#endif
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} nom_xfer_t;
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/*static*/ struct
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{
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struct
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{
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uint8_t* buffer;
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uint16_t len;
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uint8_t dir;
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}control;
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// Non control: 7 endpoints IN & OUT (offset 1)
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nom_xfer_t xfer[7][2];
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volatile bool dma_running;
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}_dcd;
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void bus_reset(void)
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{
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for(int i=0; i<8; i++)
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{
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NRF_USBD->TASKS_STARTEPIN[i] = 0;
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NRF_USBD->TASKS_STARTEPOUT[i] = 0;
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}
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NRF_USBD->TASKS_STARTISOIN = 0;
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NRF_USBD->TASKS_STARTISOOUT = 0;
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varclr_(&_dcd);
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}
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/*------------------------------------------------------------------*/
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/* Controller API
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*------------------------------------------------------------------*/
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bool dcd_init (uint8_t rhport)
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{
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(void) rhport;
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return true;
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}
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void dcd_connect (uint8_t rhport)
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{
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}
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void dcd_disconnect (uint8_t rhport)
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{
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}
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void dcd_set_address (uint8_t rhport, uint8_t dev_addr)
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{
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(void) rhport;
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// Set Address is automatically update by hw controller
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}
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void dcd_set_config (uint8_t rhport, uint8_t config_num)
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{
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(void) rhport;
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(void) config_num;
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// Nothing to do
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}
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/*------------------------------------------------------------------*/
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/* Control
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*------------------------------------------------------------------*/
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static void edpt_dma_start(uint8_t epnum, uint8_t dir)
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{
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// Only one dma could be active, TODO resolve when this is called in ISR and dma is running
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while ( _dcd.dma_running )
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{
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TU_ASSERT ( 0 == (SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk), );
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}
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_dcd.dma_running = true;
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if ( dir == TUSB_DIR_OUT )
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{
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NRF_USBD->TASKS_STARTEPOUT[epnum] = 1;
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} else
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{
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NRF_USBD->TASKS_STARTEPIN[epnum] = 1;
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}
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__ISB(); __DSB();
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}
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static void edpt_dma_end(void)
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{
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_dcd.dma_running = false;
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}
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static void control_xact_start(void)
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{
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// Each transaction is up to 64 bytes
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uint8_t const xact_len = min16_of(_dcd.control.len, MAX_PACKET_SIZE);
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if ( _dcd.control.dir == TUSB_DIR_OUT )
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{
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// TODO control out
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NRF_USBD->EPOUT[0].PTR = (uint32_t) _dcd.control.buffer;
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NRF_USBD->EPOUT[0].MAXCNT = xact_len;
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NRF_USBD->TASKS_EP0RCVOUT = 1;
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__ISB(); __DSB();
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}else
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{
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NRF_USBD->EPIN[0].PTR = (uint32_t) _dcd.control.buffer;
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NRF_USBD->EPIN[0].MAXCNT = xact_len;
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edpt_dma_start(0, TUSB_DIR_IN);
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}
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_dcd.control.buffer += xact_len;
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_dcd.control.len -= xact_len;
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}
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bool dcd_control_xfer (uint8_t rhport, tusb_dir_t dir, uint8_t * buffer, uint16_t length)
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{
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(void) rhport;
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if ( length )
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{
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// Data Phase
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_dcd.control.len = length;
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_dcd.control.buffer = buffer;
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_dcd.control.dir = (uint8_t) dir;
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control_xact_start();
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}else
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{
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// Status Phase
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NRF_USBD->TASKS_EP0STATUS = 1;
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__ISB(); __DSB();
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}
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return true;
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}
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/*------------------------------------------------------------------*/
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/*
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*------------------------------------------------------------------*/
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static inline nom_xfer_t* get_td(uint8_t epnum, uint8_t dir)
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{
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return &_dcd.xfer[epnum-1][dir];
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}
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static void normal_xact_start(uint8_t epnum, uint8_t dir)
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{
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if ( dir == TUSB_DIR_OUT )
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{
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// Errata : HW issue on nrf5284 sample, SIZE.EPOUT won't trigger ACK as spec
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// use the back door interface as sdk for walk around
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if ( nrf_drv_usbd_errata_sizeepout_rw() )
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{
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*((volatile uint32_t *)(NRF_USBD_BASE + 0x800)) = 0x7C5 + 2*epnum;
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*((volatile uint32_t *)(NRF_USBD_BASE + 0x804)) = 0;
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(void) (((volatile uint32_t *)(NRF_USBD_BASE + 0x804)));
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}
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else
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{
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// Overwrite size will allow hw to accept data
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NRF_USBD->SIZE.EPOUT[epnum] = 0;
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__ISB(); __DSB();
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}
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}else
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{
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nom_xfer_t* xfer = get_td(epnum, dir);
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// Each transaction is up to Max Packet Size
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uint8_t const xact_len = min16_of(xfer->total_len - xfer->actual_len, xfer->mps);
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NRF_USBD->EPIN[epnum].PTR = (uint32_t) xfer->buffer;
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NRF_USBD->EPIN[epnum].MAXCNT = xact_len;
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xfer->buffer += xact_len;
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edpt_dma_start(epnum, TUSB_DIR_IN);
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}
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}
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bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
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{
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(void) rhport;
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uint8_t const epnum = edpt_number(desc_edpt->bEndpointAddress);
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uint8_t const dir = edpt_dir(desc_edpt->bEndpointAddress);
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_dcd.xfer[epnum-1][dir].mps = desc_edpt->wMaxPacketSize.size;
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if ( dir == TUSB_DIR_OUT )
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{
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NRF_USBD->INTENSET = BIT_(USBD_INTEN_ENDEPOUT0_Pos + epnum);
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NRF_USBD->EPOUTEN |= BIT_(epnum);
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}else
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{
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NRF_USBD->INTENSET = BIT_(USBD_INTEN_ENDEPIN0_Pos + epnum);
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NRF_USBD->EPINEN |= BIT_(epnum);
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}
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__ISB(); __DSB();
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return true;
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}
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bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
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{
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(void) rhport;
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uint8_t const epnum = edpt_number(ep_addr);
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uint8_t const dir = edpt_dir(ep_addr);
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nom_xfer_t* xfer = get_td(epnum, dir);
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xfer->buffer = buffer;
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xfer->total_len = total_bytes;
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xfer->actual_len = 0;
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#if ERRATA_104_FIX
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// FIXME Errata 104 walkaround
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if ( nrf_drv_usbd_errata_104() )
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{
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xfer->frame_num = (uint16_t) NRF_USBD->FRAMECNTR;
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xfer->prev_size = NRF_USBD->SIZE.EPOUT[epnum];
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}
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#endif
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normal_xact_start(epnum, dir);
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return true;
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}
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void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr)
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{
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(void) rhport;
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if ( ep_addr == 0)
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{
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NRF_USBD->TASKS_EP0STALL = 1;
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}else
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{
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NRF_USBD->EPSTALL = (USBD_EPSTALL_STALL_Stall << USBD_EPSTALL_STALL_Pos) | ep_addr;
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}
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__ISB(); __DSB();
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}
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void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
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{
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(void) rhport;
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if ( ep_addr )
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{
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NRF_USBD->EPSTALL = (USBD_EPSTALL_STALL_UnStall << USBD_EPSTALL_STALL_Pos) | ep_addr;
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}
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}
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bool dcd_edpt_busy (uint8_t rhport, uint8_t ep_addr)
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{
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(void) rhport;
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// USBD shouldn't check control endpoint state
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if ( 0 == ep_addr ) return false;
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uint8_t const epnum = edpt_number(ep_addr);
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uint8_t const dir = edpt_dir(ep_addr);
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nom_xfer_t* xfer = get_td(epnum, dir);
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return xfer->actual_len < xfer->total_len;
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}
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/*------------------------------------------------------------------*/
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/*
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*------------------------------------------------------------------*/
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#if ERRATA_104_FIX
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static uint16_t frame_sofar(uint16_t fr)
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{
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uint16_t diff = (uint16_t) NRF_USBD->FRAMECNTR;
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if ( diff > fr )
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{
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diff -= fr;
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}else
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{
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diff = (diff + 1024) - fr; // Frame counter cap at 1024
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}
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return diff;
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}
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#endif
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void USBD_IRQHandler(void)
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{
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uint32_t const inten = NRF_USBD->INTEN;
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uint32_t int_status = 0;
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volatile uint32_t* regevt = &NRF_USBD->EVENTS_USBRESET;
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for(int i=0; i<32; i++)
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{
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if ( BIT_TEST_(inten, i) && regevt[i] )
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{
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int_status |= BIT_(i);
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// event clear
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regevt[i] = 0;
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__ISB(); __DSB();
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}
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}
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/*------------- Interrupt Processing -------------*/
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if ( int_status & USBD_INTEN_USBRESET_Msk )
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{
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bus_reset();
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dcd_bus_event(0, USBD_BUS_EVENT_RESET);
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}
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if ( int_status & EDPT_END_ALL_MASK )
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{
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// DMA complete move data from SRAM -> Endpoint
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edpt_dma_end();
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}
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/*------------- Control Transfer -------------*/
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if ( int_status & USBD_INTEN_EP0SETUP_Msk )
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{
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uint8_t setup[8] = {
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NRF_USBD->BMREQUESTTYPE, NRF_USBD->BREQUEST, NRF_USBD->WVALUEL, NRF_USBD->WVALUEH,
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NRF_USBD->WINDEXL, NRF_USBD->WINDEXH, NRF_USBD->WLENGTHL, NRF_USBD->WLENGTHH
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};
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dcd_setup_received(0, setup);
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}
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if ( int_status & USBD_INTEN_EP0DATADONE_Msk )
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{
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if ( _dcd.control.dir == TUSB_DIR_OUT )
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{
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// OUT data from Host -> Endpoint
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// Trigger DMA to move Endpoint -> SRAM
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edpt_dma_start(0, TUSB_DIR_OUT);
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}else
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{
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// IN: data transferred from Endpoint -> Host
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if ( _dcd.control.len > 0 )
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{
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control_xact_start();
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}else
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{
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// Control IN complete
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dcd_xfer_complete(0, 0, 0, true);
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}
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}
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}
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// OUT data moved from Endpoint -> SRAM
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if ( int_status & USBD_INTEN_ENDEPOUT0_Msk)
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{
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if ( _dcd.control.len > 0 )
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{
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control_xact_start();
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}else
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{
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// Control OUT complete
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dcd_xfer_complete(0, 0, 0, true);
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}
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}
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/*------------- Bulk/Interrupt Transfer -------------*/
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if ( int_status & USBD_INTEN_EPDATA_Msk)
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{
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uint32_t data_status = NRF_USBD->EPDATASTATUS;
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nrf_usbd_epdatastatus_clear(data_status);
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// In: data from Endpoint -> Host
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for(uint8_t epnum=1; epnum<8; epnum++)
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{
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if ( BIT_TEST_(data_status, epnum ) )
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{
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nom_xfer_t* xfer = get_td(epnum, TUSB_DIR_IN);
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xfer->actual_len += NRF_USBD->EPIN[epnum].MAXCNT;
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if ( xfer->actual_len < xfer->total_len )
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{
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// more to xfer
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normal_xact_start(epnum, TUSB_DIR_IN);
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} else
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{
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// BULK/INT IN complete
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dcd_xfer_complete(0, epnum | TUSB_DIR_IN_MASK, xfer->actual_len, true);
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}
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}
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}
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// OUT: data from Host -> Endpoint
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for(uint8_t epnum=1; epnum<8; epnum++)
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{
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if ( BIT_TEST_(data_status, 16+epnum ) )
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{
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nom_xfer_t* xfer = get_td(epnum, TUSB_DIR_OUT);
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uint8_t const xact_len = NRF_USBD->SIZE.EPOUT[epnum];
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// FIXME nrf52840 rev A does not NAK OUT packet properly
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TU_ASSERT(xfer->actual_len < xfer->total_len, );
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#if ERRATA_104_FIX
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// FIXME Errata 104 walkaround
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if ( nrf_drv_usbd_errata_104() )
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{
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xfer->prev_size = xact_len;
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xfer->frame_num = (uint16_t) NRF_USBD->FRAMECNTR;
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}
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#endif
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// Trigger DMA move data from Endpoint -> SRAM
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NRF_USBD->EPOUT[epnum].PTR = (uint32_t) xfer->buffer;
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NRF_USBD->EPOUT[epnum].MAXCNT = xact_len;
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edpt_dma_start(epnum, TUSB_DIR_OUT);
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xfer->buffer += xact_len;
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xfer->actual_len += xact_len;
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}
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}
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}
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// OUT: data from DMA -> SRAM
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for(uint8_t epnum=1; epnum<8; epnum++)
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{
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if ( BIT_TEST_(int_status, USBD_INTEN_ENDEPOUT0_Pos+epnum) )
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{
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nom_xfer_t* xfer = get_td(epnum, TUSB_DIR_OUT);
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uint8_t const xact_len = NRF_USBD->EPOUT[epnum].AMOUNT;
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// Transfer complete if transaction len < Max Packet Size or total len is transferred
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if ( (xact_len == xfer->mps) && (xfer->actual_len < xfer->total_len) )
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{
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// Prepare for more data from Host -> Endpoint
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normal_xact_start(epnum, TUSB_DIR_OUT);
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}else
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{
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xfer->total_len = xfer->actual_len;
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// BULK/INT OUT complete
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dcd_xfer_complete(0, epnum, xfer->actual_len, true);
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}
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}
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}
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|
// SOF interrupt
|
|
if ( int_status & USBD_INTEN_SOF_Msk )
|
|
{
|
|
dcd_bus_event(0, USBD_BUS_EVENT_SOF);
|
|
|
|
#if ERRATA_104_FIX
|
|
// FIXME Errata 104 The EPDATA event might not be generated, and the related update of EPDATASTATUS does not occur.
|
|
// There is no way for software to tell if a xfer is complete or not.
|
|
// Walkaround: we will asssume an non-control IN transfer is always complete after 10 frames
|
|
if ( nrf_drv_usbd_errata_104() )
|
|
{
|
|
// Check all OUT transfer, if the SIZE changes --> consider it is complete
|
|
for (int ep=1; ep<8; ep++)
|
|
{
|
|
nom_xfer_t* xfer = get_td(ep, TUSB_DIR_OUT);
|
|
uint8_t const xact_len = NRF_USBD->SIZE.EPOUT[ep];
|
|
|
|
|
|
if ( frame_sofar(xfer->frame_num) > 20)
|
|
{
|
|
if ( (xact_len != 0) && (xfer->actual_len < xfer->total_len) && (xfer->prev_size != xact_len) )
|
|
{
|
|
xfer->prev_size = xact_len;
|
|
xfer->frame_num = (uint16_t) NRF_USBD->FRAMECNTR;
|
|
|
|
// Trigger DMA move data from Endpoint -> SRAM
|
|
NRF_USBD->EPOUT[ep].PTR = (uint32_t) xfer->buffer;
|
|
NRF_USBD->EPOUT[ep].MAXCNT = xact_len;
|
|
|
|
edpt_dma_start(ep, TUSB_DIR_OUT);
|
|
|
|
xfer->buffer += xact_len;
|
|
xfer->actual_len += xact_len;
|
|
}
|
|
}
|
|
}
|
|
|
|
// Check all the queued IN transfer, retire all transfer if 10 frames has passed
|
|
for (int ep=1; ep< 8; ep++)
|
|
{
|
|
nom_xfer_t* xfer = get_td(ep, TUSB_DIR_IN);
|
|
|
|
if (xfer->actual_len < xfer->total_len)
|
|
{
|
|
// Walkaround, mark this transfer as complete
|
|
if (frame_sofar(xfer->frame_num) > 10)
|
|
{
|
|
xfer->actual_len = xfer->total_len;
|
|
dcd_xfer_complete(0, ep | TUSB_DIR_IN_MASK, xfer->actual_len, true);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
}
|
|
|
|
#endif
|