142 lines
4.5 KiB
C
142 lines
4.5 KiB
C
/**********************************************************************
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* $Id$ system_lpc43xx.c 2012-05-21
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*//**
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* @file system_lpc43xx.c
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* @brief Cortex-M3 Device System Source File for NXP lpc43xx Series.
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* @version 1.0
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* @date 21. May. 2011
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* @author NXP MCU SW Application Team
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*
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* Copyright(C) 2011, NXP Semiconductor
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* All rights reserved.
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*
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***********************************************************************
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* products. This software is supplied "AS IS" without any warranties.
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* NXP Semiconductors assumes no responsibility or liability for the
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* use of the software, conveys no license or title under any patent,
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* copyright, or mask work right to the product. NXP Semiconductors
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* reserves the right to make changes in the software without
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* notification. NXP Semiconductors also make no representation or
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* warranty that such application will be suitable for the specified
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* use without further testing or modification.
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors'
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* relevant copyright in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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**********************************************************************/
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#include "LPC43xx.h"
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#if !defined(__CODE_RED)
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#include "fpu_enable.h"
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#endif
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// CodeRed - call clock init code by default
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#ifdef __CODE_RED
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#include "lpc43xx_cgu.h"
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#endif
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/*----------------------------------------------------------------------------
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Define clocks
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*----------------------------------------------------------------------------*/
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#define __IRC (12000000UL) /* IRC Oscillator frequency */
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/*----------------------------------------------------------------------------
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Clock Variable definitions
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*----------------------------------------------------------------------------*/
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uint32_t SystemCoreClock = __IRC; /*!< System Clock Frequency (Core Clock)*/
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extern uint32_t getPC(void);
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/**
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* Initialize the system
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*
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* @param none
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* @return none
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*
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* @brief Setup the microcontroller system.
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* Initialize the System.
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*/
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void SystemInit (void)
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{
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uint32_t org;
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#if !defined(__CODE_RED)
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#if defined(CORE_M4) && defined(USE_FPU)
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fpuEnable();
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#endif
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#endif
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#if !defined(CORE_M0)
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// Set up Cortex_M3 or M4 VTOR register to point to vector table
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// This code uses a toolchain defined symbol to locate the vector table
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// If this is not completed, interrupts are likely to cause an exception.
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unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
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#if defined(__IAR_SYSTEMS_ICC__)
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extern void *__vector_table;
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org = *pSCB_VTOR = (unsigned int)&__vector_table;
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#elif defined(__CODE_RED)
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extern void *g_pfnVectors;
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// CodeRed - correct to assign address of variable not contents
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// org = *pSCB_VTOR = (unsigned int)g_pfnVectors;
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org = *pSCB_VTOR = (unsigned int)&g_pfnVectors;
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#elif defined(__ARMCC_VERSION)
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extern void *__Vectors;
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org = *pSCB_VTOR = (unsigned int)&__Vectors;
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#else
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#error Unknown compiler
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#endif
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#else
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// Cortex M0?
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#error Cannot configure VTOR on Cortex_M0
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#endif
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// LPC18xx/LPC43xx ROM sets the PLL to run from IRC and drive the part
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// at 96 MHz out of reset
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SystemCoreClock = 96000000;
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// In case we are running from external flash, (booted by boot rom)
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// We enable the EMC buffer to improve performance.
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if(org == 0x1C000000)
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{
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/*Enable Buffer for External Flash*/
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LPC_EMC->STATICCONFIG0 |= 1<<19;
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}
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// CodeRed - call clock init code by default
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#ifdef __CODE_RED
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// Call clock initialisation code
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CGU_Init();
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#endif
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// In case we are running from internal flash, we configure the flash
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// accelerator. This is a conservative value that should work up to 204
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// MHz on the LPC43xx or 180 MHz on the LPC18xx. This value may change
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// as the chips are characterized and should also change based on
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// core clock speed.
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#define FLASH_ACCELERATOR_SPEED 6
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#ifdef INTERNAL_FLASH
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{
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uint32_t *MAM,t;
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// Set up flash controller for both banks
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// Bank A
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MAM = (uint32_t *)(LPC_CREG_BASE + 0x120);
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t=*MAM;
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t &= ~(0xF<<12);
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*MAM = t | (FLASH_ACCELERATOR_SPEED<<12);
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// Bank B
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MAM = (uint32_t *)(LPC_CREG_BASE + 0x124);
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t=*MAM;
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t &= ~(0xF<<12);
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*MAM = t | (FLASH_ACCELERATOR_SPEED<<12);
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}
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#endif
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}
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