68 lines
1.8 KiB
Makefile
68 lines
1.8 KiB
Makefile
UF2_FAMILY_ID = 0x2abc77ec
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SDK_DIR = hw/mcu/nxp/mcux-sdk
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DEPS_SUBMODULES += lib/sct_neopixel $(SDK_DIR)
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include $(TOP)/$(BOARD_PATH)/board.mk
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# Default to Highspeed PORT1
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PORT ?= 1
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CFLAGS += \
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-flto \
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-mthumb \
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-mabi=aapcs \
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-mcpu=cortex-m33 \
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-mfloat-abi=hard \
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-mfpu=fpv5-sp-d16 \
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-DCFG_TUSB_MCU=OPT_MCU_LPC55XX \
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-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' \
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-DBOARD_DEVICE_RHPORT_NUM=$(PORT)
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ifeq ($(PORT), 1)
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$(info "PORT1 High Speed")
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CFLAGS += -DBOARD_DEVICE_RHPORT_SPEED=OPT_MODE_HIGH_SPEED
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# LPC55 Highspeed Port1 can only write to USB_SRAM region
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CFLAGS += -DCFG_TUSB_MEM_SECTION='__attribute__((section("m_usb_global")))'
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else
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$(info "PORT0 Full Speed")
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endif
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# mcu driver cause following warnings
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CFLAGS += -Wno-error=unused-parameter -Wno-error=float-equal
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MCU_DIR = $(SDK_DIR)/devices/$(MCU_VARIANT)
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# All source paths should be relative to the top level.
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LD_FILE ?= $(MCU_DIR)/gcc/$(MCU_CORE)_flash.ld
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SRC_C += \
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src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \
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$(MCU_DIR)/system_$(MCU_CORE).c \
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$(MCU_DIR)/drivers/fsl_clock.c \
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$(MCU_DIR)/drivers/fsl_power.c \
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$(MCU_DIR)/drivers/fsl_reset.c \
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$(SDK_DIR)/drivers/lpc_gpio/fsl_gpio.c \
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$(SDK_DIR)/drivers/flexcomm/fsl_flexcomm.c \
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$(SDK_DIR)/drivers/flexcomm/fsl_usart.c \
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lib/sct_neopixel/sct_neopixel.c
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INC += \
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$(TOP)/$(BOARD_PATH) \
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$(TOP)/lib/sct_neopixel \
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$(TOP)/$(MCU_DIR)/../../CMSIS/Include \
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$(TOP)/$(MCU_DIR) \
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$(TOP)/$(MCU_DIR)/drivers \
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$(TOP)/$(SDK_DIR)/drivers/common \
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$(TOP)/$(SDK_DIR)/drivers/flexcomm \
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$(TOP)/$(SDK_DIR)/drivers/lpc_iocon \
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$(TOP)/$(SDK_DIR)/drivers/lpc_gpio \
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$(TOP)/$(SDK_DIR)/drivers/sctimer
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SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_CORE).S
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LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower_hardabi.a
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# For freeRTOS port source
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FREERTOS_PORT = ARM_CM33_NTZ/non_secure
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