288 lines
10 KiB
ArmAsm
288 lines
10 KiB
ArmAsm
;/**************************************************************************//**
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; * @file startup_LPC17xx.s
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; * @brief CMSIS Cortex-M3 Core Device Startup File for
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; * NXP LPC17xx Device Series
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; * @version V1.10
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; * @date 06. April 2011
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; *
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; * @note
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; * Copyright (C) 2009-2011 ARM Limited. All rights reserved.
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; *
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; * @par
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; * ARM Limited (ARM) is supplying this software for use with Cortex-M
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; * processor based microcontrollers. This file can be freely distributed
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; * within development tools that are supporting such ARM based processors.
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; *
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; * @par
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; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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; *
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; ******************************************************************************/
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; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
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; <h> Stack Configuration
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; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Stack_Size EQU 0x00000200
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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Stack_Mem SPACE Stack_Size
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__initial_sp
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; <h> Heap Configuration
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; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Heap_Size EQU 0x00000000
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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__Vectors DCD __initial_sp ; Top of Stack
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD MemManage_Handler ; MPU Fault Handler
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DCD BusFault_Handler ; Bus Fault Handler
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DCD UsageFault_Handler ; Usage Fault Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall Handler
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DCD DebugMon_Handler ; Debug Monitor Handler
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DCD 0 ; Reserved
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DCD PendSV_Handler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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; External Interrupts
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DCD WDT_IRQHandler ; 16: Watchdog Timer
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DCD TIMER0_IRQHandler ; 17: Timer0
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DCD TIMER1_IRQHandler ; 18: Timer1
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DCD TIMER2_IRQHandler ; 19: Timer2
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DCD TIMER3_IRQHandler ; 20: Timer3
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DCD UART0_IRQHandler ; 21: UART0
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DCD UART1_IRQHandler ; 22: UART1
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DCD UART2_IRQHandler ; 23: UART2
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DCD UART3_IRQHandler ; 24: UART3
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DCD PWM1_IRQHandler ; 25: PWM1
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DCD I2C0_IRQHandler ; 26: I2C0
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DCD I2C1_IRQHandler ; 27: I2C1
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DCD I2C2_IRQHandler ; 28: I2C2
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DCD SPI_IRQHandler ; 29: SPI
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DCD SSP0_IRQHandler ; 30: SSP0
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DCD SSP1_IRQHandler ; 31: SSP1
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DCD PLL0_IRQHandler ; 32: PLL0 Lock (Main PLL)
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DCD RTC_IRQHandler ; 33: Real Time Clock
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DCD EINT0_IRQHandler ; 34: External Interrupt 0
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DCD EINT1_IRQHandler ; 35: External Interrupt 1
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DCD EINT2_IRQHandler ; 36: External Interrupt 2
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DCD EINT3_IRQHandler ; 37: External Interrupt 3
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DCD ADC_IRQHandler ; 38: A/D Converter
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DCD BOD_IRQHandler ; 39: Brown-Out Detect
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DCD USB_IRQHandler ; 40: USB
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DCD CAN_IRQHandler ; 41: CAN
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DCD DMA_IRQHandler ; 42: General Purpose DMA
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DCD I2S_IRQHandler ; 43: I2S
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DCD ENET_IRQHandler ; 44: Ethernet
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DCD RIT_IRQHandler ; 45: Repetitive Interrupt Timer
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DCD MCPWM_IRQHandler ; 46: Motor Control PWM
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DCD QEI_IRQHandler ; 47: Quadrature Encoder Interface
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DCD PLL1_IRQHandler ; 48: PLL1 Lock (USB PLL)
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DCD USBActivity_IRQHandler ; 49: USB Activity interrupt to wakeup
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DCD CANActivity_IRQHandler ; 50: CAN Activity interrupt to wakeup
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IF :LNOT::DEF:NO_CRP
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AREA |.ARM.__at_0x02FC|, CODE, READONLY
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CRP_Key DCD 0xFFFFFFFF
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ENDIF
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AREA |.text|, CODE, READONLY
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; Reset Handler
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Reset_Handler PROC
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EXPORT Reset_Handler [WEAK]
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IMPORT SystemInit
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IMPORT __main
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LDR R0, =SystemInit
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BLX R0
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LDR R0, =__main
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BX R0
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ENDP
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; Dummy Exception Handlers (infinite loops which can be modified)
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NMI_Handler PROC
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EXPORT NMI_Handler [WEAK]
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B .
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ENDP
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HardFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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B .
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ENDP
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MemManage_Handler\
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PROC
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EXPORT MemManage_Handler [WEAK]
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B .
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ENDP
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BusFault_Handler\
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PROC
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EXPORT BusFault_Handler [WEAK]
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B .
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ENDP
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UsageFault_Handler\
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PROC
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EXPORT UsageFault_Handler [WEAK]
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B .
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ENDP
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SVC_Handler PROC
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EXPORT SVC_Handler [WEAK]
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B .
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ENDP
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DebugMon_Handler\
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PROC
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EXPORT DebugMon_Handler [WEAK]
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B .
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ENDP
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PendSV_Handler PROC
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EXPORT PendSV_Handler [WEAK]
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B .
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ENDP
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SysTick_Handler PROC
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EXPORT SysTick_Handler [WEAK]
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B .
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ENDP
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Default_Handler PROC
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EXPORT WDT_IRQHandler [WEAK]
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EXPORT TIMER0_IRQHandler [WEAK]
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EXPORT TIMER1_IRQHandler [WEAK]
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EXPORT TIMER2_IRQHandler [WEAK]
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EXPORT TIMER3_IRQHandler [WEAK]
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EXPORT UART0_IRQHandler [WEAK]
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EXPORT UART1_IRQHandler [WEAK]
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EXPORT UART2_IRQHandler [WEAK]
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EXPORT UART3_IRQHandler [WEAK]
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EXPORT PWM1_IRQHandler [WEAK]
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EXPORT I2C0_IRQHandler [WEAK]
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EXPORT I2C1_IRQHandler [WEAK]
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EXPORT I2C2_IRQHandler [WEAK]
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EXPORT SPI_IRQHandler [WEAK]
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EXPORT SSP0_IRQHandler [WEAK]
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EXPORT SSP1_IRQHandler [WEAK]
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EXPORT PLL0_IRQHandler [WEAK]
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EXPORT RTC_IRQHandler [WEAK]
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EXPORT EINT0_IRQHandler [WEAK]
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EXPORT EINT1_IRQHandler [WEAK]
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EXPORT EINT2_IRQHandler [WEAK]
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EXPORT EINT3_IRQHandler [WEAK]
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EXPORT ADC_IRQHandler [WEAK]
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EXPORT BOD_IRQHandler [WEAK]
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EXPORT USB_IRQHandler [WEAK]
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EXPORT CAN_IRQHandler [WEAK]
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EXPORT DMA_IRQHandler [WEAK]
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EXPORT I2S_IRQHandler [WEAK]
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EXPORT ENET_IRQHandler [WEAK]
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EXPORT RIT_IRQHandler [WEAK]
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EXPORT MCPWM_IRQHandler [WEAK]
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EXPORT QEI_IRQHandler [WEAK]
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EXPORT PLL1_IRQHandler [WEAK]
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EXPORT USBActivity_IRQHandler [WEAK]
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EXPORT CANActivity_IRQHandler [WEAK]
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WDT_IRQHandler
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TIMER0_IRQHandler
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TIMER1_IRQHandler
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TIMER2_IRQHandler
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TIMER3_IRQHandler
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UART0_IRQHandler
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UART1_IRQHandler
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UART2_IRQHandler
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UART3_IRQHandler
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PWM1_IRQHandler
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I2C0_IRQHandler
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I2C1_IRQHandler
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I2C2_IRQHandler
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SPI_IRQHandler
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SSP0_IRQHandler
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SSP1_IRQHandler
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PLL0_IRQHandler
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RTC_IRQHandler
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EINT0_IRQHandler
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EINT1_IRQHandler
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EINT2_IRQHandler
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EINT3_IRQHandler
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ADC_IRQHandler
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BOD_IRQHandler
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USB_IRQHandler
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CAN_IRQHandler
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DMA_IRQHandler
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I2S_IRQHandler
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ENET_IRQHandler
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RIT_IRQHandler
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MCPWM_IRQHandler
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QEI_IRQHandler
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PLL1_IRQHandler
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USBActivity_IRQHandler
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CANActivity_IRQHandler
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B .
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ENDP
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ALIGN
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; User Initial Stack & Heap
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IF :DEF:__MICROLIB
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EXPORT __initial_sp
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EXPORT __heap_base
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EXPORT __heap_limit
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ELSE
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IMPORT __use_two_region_memory
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EXPORT __user_initial_stackheap
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__user_initial_stackheap
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LDR R0, = Heap_Mem
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LDR R1, =(Stack_Mem + Stack_Size)
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LDR R2, = (Heap_Mem + Heap_Size)
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LDR R3, = Stack_Mem
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BX LR
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ALIGN
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ENDIF
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END
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