133 lines
5.0 KiB
C
133 lines
5.0 KiB
C
/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021, Ha Thach (tinyusb.org)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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#ifndef BOARD_H_
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#define BOARD_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define LED_PORT GPIOE
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#define LED_PIN GPIO_PIN_3
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#define LED_STATE_ON 1
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// Blue push-button
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#define BUTTON_PORT GPIOC
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#define BUTTON_PIN GPIO_PIN_13
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#define BUTTON_STATE_ACTIVE 1
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// UART
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//#define UART_DEV USART3
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//#define UART_CLK_EN __HAL_RCC_USART3_CLK_ENABLE
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//#define UART_GPIO_PORT GPIOB
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//#define UART_GPIO_AF GPIO_AF7_USART3
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//#define UART_TX_PIN GPIO_PIN_10
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//#define UART_RX_PIN GPIO_PIN_11
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// VBUS Sense detection
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#define OTG_FS_VBUS_SENSE 1
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#define OTG_HS_VBUS_SENSE 0
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//--------------------------------------------------------------------+
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// RCC Clock
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//--------------------------------------------------------------------+
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static inline void SystemClock_Config(void) {
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
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// Supply configuration update enable
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HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
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// Configure the main internal regulator output voltage
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
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while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
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// Configure the PLL clock source
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__HAL_RCC_PLL_PLLSOURCE_CONFIG(RCC_PLLSOURCE_HSE);
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// Initializes the CPU, AHB and APB busses clocks
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.LSIState = RCC_LSI_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = 5;
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RCC_OscInitStruct.PLL.PLLN = 96;
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RCC_OscInitStruct.PLL.PLLP = 2;
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RCC_OscInitStruct.PLL.PLLQ = 2;
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RCC_OscInitStruct.PLL.PLLR = 2;
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RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
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RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
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RCC_OscInitStruct.PLL.PLLFRACN = 0;
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HAL_RCC_OscConfig(&RCC_OscInitStruct);
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// Initializes the CPU, AHB and APB busses clocks
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
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|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
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|RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
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RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV1;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV1;
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RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV1;
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HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1);
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_SPI4
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|RCC_PERIPHCLK_SPI1|RCC_PERIPHCLK_USB
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|RCC_PERIPHCLK_QSPI;
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PeriphClkInitStruct.PLL3.PLL3M = 10;
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PeriphClkInitStruct.PLL3.PLL3N = 96;
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PeriphClkInitStruct.PLL3.PLL3P = 5;
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PeriphClkInitStruct.PLL3.PLL3Q = 5;
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PeriphClkInitStruct.PLL3.PLL3R = 2;
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PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3VCIRANGE_1;
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PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3VCOWIDE;
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PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
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PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_D1HCLK;
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PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL;
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PeriphClkInitStruct.Spi45ClockSelection = RCC_SPI45CLKSOURCE_D2PCLK1;
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PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3;
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PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI;
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HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
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// Enable USB Voltage detector
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HAL_PWREx_EnableUSBVoltageDetector();
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}
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static inline void board_init2(void) {
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// For this board does nothing
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}
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#ifdef __cplusplus
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}
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#endif
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#endif
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