 71fb6469d4
			
		
	
	71fb6469d4
	
	
	
		
			
			- CFG_TUD_MEM_SECTION and CFG_TUD_MEM_ALIGN - CFG_TUH_MEM_SECTION and CFG_TUH_MEM_ALIGN - fix missing mem section and align for host
		
			
				
	
	
		
			48 lines
		
	
	
		
			1.2 KiB
		
	
	
	
		
			Makefile
		
	
	
	
	
	
			
		
		
	
	
			48 lines
		
	
	
		
			1.2 KiB
		
	
	
	
		
			Makefile
		
	
	
	
	
	
| DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
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| 
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| CFLAGS += \
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|   -flto \
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|   -mthumb \
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|   -mabi=aapcs \
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|   -mcpu=cortex-m4 \
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|   -mfloat-abi=hard \
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|   -mfpu=fpv4-sp-d16 \
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|   -nostdlib \
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|   -DCORE_M4 \
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|   -D__USE_LPCOPEN \
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|   -DCFG_TUD_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \
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|   -DCFG_TUH_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \
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|   -DCFG_TUSB_MCU=OPT_MCU_LPC40XX
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| 
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| # mcu driver cause following warnings
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| CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=cast-qual
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| 
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| MCU_DIR = hw/mcu/nxp/lpcopen/lpc40xx/lpc_chip_40xx
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| 
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| # All source paths should be relative to the top level.
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| LD_FILE = hw/bsp/$(BOARD)/lpc4088.ld
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| 
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| SRC_C += \
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| 	src/portable/nxp/lpc17_40/dcd_lpc17_40.c \
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| 	$(MCU_DIR)/../gcc/cr_startup_lpc40xx.c \
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| 	$(MCU_DIR)/src/chip_17xx_40xx.c \
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| 	$(MCU_DIR)/src/clock_17xx_40xx.c \
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| 	$(MCU_DIR)/src/gpio_17xx_40xx.c \
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| 	$(MCU_DIR)/src/iocon_17xx_40xx.c \
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| 	$(MCU_DIR)/src/sysctl_17xx_40xx.c \
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| 	$(MCU_DIR)/src/sysinit_17xx_40xx.c \
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| 	$(MCU_DIR)/src/uart_17xx_40xx.c \
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| 	$(MCU_DIR)/src/fpu_init.c
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| 
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| INC += \
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| 	$(TOP)/$(MCU_DIR)/inc
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| 
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| # For freeRTOS port source
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| FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
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| 
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| # For flash-jlink target
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| JLINK_DEVICE = LPC4088
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| 
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| # flash using jlink
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| flash: flash-jlink
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