280 lines
9.6 KiB
ArmAsm
280 lines
9.6 KiB
ArmAsm
;/**************************************************************************//**
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; * @file startup_LPC13Uxx.s
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; * @brief CMSIS Cortex-M3 Core Device Startup File
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; * for the NXP LPC13Uxx Device Series
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; * @version V1.10
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; * @date 24. November 2010
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; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
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; *
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; * @note
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; * Copyright (C) 2009-2010 ARM Limited. All rights reserved.
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; *
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; * @par
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; * ARM Limited (ARM) is supplying this software for use with Cortex-M
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; * processor based microcontrollers. This file can be freely distributed
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; * within development tools that are supporting such ARM based processors.
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; *
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; * @par
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; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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; *
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; ******************************************************************************/
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; <h> Stack Configuration
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; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Stack_Size EQU 0x00000200
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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Stack_Mem SPACE Stack_Size
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__initial_sp
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; <h> Heap Configuration
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; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Heap_Size EQU 0x00000000
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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__Vectors DCD __initial_sp ; Top of Stack
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD MemManage_Handler ; MPU Fault Handler
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DCD BusFault_Handler ; Bus Fault Handler
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DCD UsageFault_Handler ; Usage Fault Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall Handler
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DCD DebugMon_Handler ; Debug Monitor Handler
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DCD 0 ; Reserved
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DCD PendSV_Handler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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; External Interrupts
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DCD PIN_INT0_IRQHandler ; All GPIO pin can be routed to PIN_INTx
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DCD PIN_INT1_IRQHandler
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DCD PIN_INT2_IRQHandler
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DCD PIN_INT3_IRQHandler
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DCD PIN_INT4_IRQHandler
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DCD PIN_INT5_IRQHandler
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DCD PIN_INT6_IRQHandler
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DCD PIN_INT7_IRQHandler
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DCD GINT0_IRQHandler
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DCD GINT1_IRQHandler ; PIO0 (0:7)
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DCD Reserved_IRQHandler ; Reserved
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DCD Reserved_IRQHandler
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DCD OSTIMER_IRQHandler
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DCD Reserved_IRQHandler
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DCD SSP1_IRQHandler ; SSP1
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DCD I2C_IRQHandler ; I2C
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DCD CT16B0_IRQHandler ; 16-bit Timer0
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DCD CT16B1_IRQHandler ; 16-bit Timer1
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DCD CT32B0_IRQHandler ; 32-bit Timer0
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DCD CT32B1_IRQHandler ; 32-bit Timer1
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DCD SSP0_IRQHandler ; SSP0
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DCD USART_IRQHandler ; USART
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DCD USB_IRQHandler ; USB IRQ
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DCD USB_FIQHandler ; USB FIQ
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DCD ADC_IRQHandler ; A/D Converter
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DCD WDT_IRQHandler ; Watchdog timer
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DCD BOD_IRQHandler ; Brown Out Detect
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DCD FMC_IRQHandler ; IP2111 Flash Memory Controller
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DCD OSCFAIL_IRQHandler ; OSC FAIL
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DCD PVTCIRCUIT_IRQHandler ; PVT CIRCUIT
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DCD USBWakeup_IRQHandler ; USB wake up
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DCD Reserved_IRQHandler ; Reserved
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IF :LNOT::DEF:NO_CRP
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AREA |.ARM.__at_0x02FC|, CODE, READONLY
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CRP_Key DCD 0xFFFFFFFF
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ENDIF
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AREA |.text|, CODE, READONLY
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; Reset Handler
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Reset_Handler PROC
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EXPORT Reset_Handler [WEAK]
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IMPORT SystemInit
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IMPORT __main
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LDR R0, =SystemInit
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BLX R0
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LDR R0, =__main
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BX R0
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ENDP
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; Dummy Exception Handlers (infinite loops which can be modified)
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; now, under COMMON NMI.c and NMI.h, a real NMI handler is created if NMI is enabled
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; for particular peripheral.
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;NMI_Handler PROC
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; EXPORT NMI_Handler [WEAK]
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; B .
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; ENDP
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HardFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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B .
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ENDP
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SVC_Handler PROC
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EXPORT SVC_Handler [WEAK]
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B .
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ENDP
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MemManage_Handler\
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PROC
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EXPORT MemManage_Handler [WEAK]
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B .
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ENDP
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BusFault_Handler\
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PROC
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EXPORT BusFault_Handler [WEAK]
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B .
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ENDP
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DebugMon_Handler\
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PROC
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EXPORT DebugMon_Handler [WEAK]
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B .
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ENDP
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UsageFault_Handler\
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PROC
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EXPORT UsageFault_Handler [WEAK]
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B .
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ENDP
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PendSV_Handler PROC
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EXPORT PendSV_Handler [WEAK]
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B .
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ENDP
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SysTick_Handler PROC
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EXPORT SysTick_Handler [WEAK]
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B .
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ENDP
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Reserved_IRQHandler PROC
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EXPORT Reserved_IRQHandler [WEAK]
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B .
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ENDP
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Default_Handler PROC
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EXPORT NMI_Handler [WEAK]
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EXPORT PIN_INT0_IRQHandler [WEAK]
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EXPORT PIN_INT1_IRQHandler [WEAK]
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EXPORT PIN_INT2_IRQHandler [WEAK]
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EXPORT PIN_INT3_IRQHandler [WEAK]
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EXPORT PIN_INT4_IRQHandler [WEAK]
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EXPORT PIN_INT5_IRQHandler [WEAK]
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EXPORT PIN_INT6_IRQHandler [WEAK]
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EXPORT PIN_INT7_IRQHandler [WEAK]
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EXPORT GINT0_IRQHandler [WEAK]
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EXPORT GINT1_IRQHandler [WEAK]
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EXPORT OSTIMER_IRQHandler [WEAK]
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EXPORT SSP1_IRQHandler [WEAK]
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EXPORT I2C_IRQHandler [WEAK]
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EXPORT CT16B0_IRQHandler [WEAK]
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EXPORT CT16B1_IRQHandler [WEAK]
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EXPORT CT32B0_IRQHandler [WEAK]
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EXPORT CT32B1_IRQHandler [WEAK]
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EXPORT SSP0_IRQHandler [WEAK]
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EXPORT USART_IRQHandler [WEAK]
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EXPORT USB_IRQHandler [WEAK]
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EXPORT USB_FIQHandler [WEAK]
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EXPORT ADC_IRQHandler [WEAK]
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EXPORT WDT_IRQHandler [WEAK]
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EXPORT BOD_IRQHandler [WEAK]
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EXPORT FMC_IRQHandler [WEAK]
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EXPORT OSCFAIL_IRQHandler [WEAK]
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EXPORT PVTCIRCUIT_IRQHandler [WEAK]
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EXPORT USBWakeup_IRQHandler [WEAK]
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NMI_Handler
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PIN_INT0_IRQHandler
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PIN_INT1_IRQHandler
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PIN_INT2_IRQHandler
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PIN_INT3_IRQHandler
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PIN_INT4_IRQHandler
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PIN_INT5_IRQHandler
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PIN_INT6_IRQHandler
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PIN_INT7_IRQHandler
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GINT0_IRQHandler
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GINT1_IRQHandler
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OSTIMER_IRQHandler
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SSP1_IRQHandler
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I2C_IRQHandler
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CT16B0_IRQHandler
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CT16B1_IRQHandler
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CT32B0_IRQHandler
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CT32B1_IRQHandler
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SSP0_IRQHandler
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USART_IRQHandler
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USB_IRQHandler
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USB_FIQHandler
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ADC_IRQHandler
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WDT_IRQHandler
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BOD_IRQHandler
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FMC_IRQHandler
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OSCFAIL_IRQHandler
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PVTCIRCUIT_IRQHandler
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USBWakeup_IRQHandler
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B .
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ENDP
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ALIGN
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; User Initial Stack & Heap
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IF :DEF:__MICROLIB
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EXPORT __initial_sp
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EXPORT __heap_base
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EXPORT __heap_limit
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ELSE
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IMPORT __use_two_region_memory
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EXPORT __user_initial_stackheap
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__user_initial_stackheap
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LDR R0, = Heap_Mem
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LDR R1, =(Stack_Mem + Stack_Size)
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LDR R2, = (Heap_Mem + Heap_Size)
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LDR R3, = Stack_Mem
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BX LR
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ALIGN
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ENDIF
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END
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