46 lines
1.3 KiB
Makefile
46 lines
1.3 KiB
Makefile
ST_FAMILY = f1
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DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/st/cmsis_device_$(ST_FAMILY) hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
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ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
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ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
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include $(TOP)/$(BOARD_PATH)/board.mk
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CPU_CORE ?= cortex-m3
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# --------------
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# Compiler Flags
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# --------------
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CFLAGS += \
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-DCFG_TUSB_MCU=OPT_MCU_STM32F1
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# GCC Flags
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CFLAGS_GCC += \
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-flto \
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-nostdlib -nostartfiles \
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# ------------------------
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# All source paths should be relative to the top level.
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# ------------------------
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SRC_C += \
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src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
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$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
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$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
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$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
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$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
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$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
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$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c
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INC += \
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$(TOP)/$(BOARD_PATH) \
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$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
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$(TOP)/$(ST_CMSIS)/Include \
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$(TOP)/$(ST_HAL_DRIVER)/Inc
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# Startup
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SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
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SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s
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# flash target ROM bootloader
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flash-dfu-util: $(BUILD)/$(PROJECT).bin
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dfu-util -R -a 0 --dfuse-address 0x08000000 -D $<
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