56 lines
2.6 KiB
Plaintext
56 lines
2.6 KiB
Plaintext
/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
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/*-Specials-*/
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define symbol __ICFEDIT_intvec_start__ = 0x08000000;
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/*-Memory Regions-*/
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define symbol NONCACHEABLEBUFFER_size = 0x400;
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define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
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define symbol __ICFEDIT_region_ROM_end__ = 0x0800FFFF;
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define symbol __ICFEDIT_region_RAM_start__ = 0x24000000;
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define symbol __ICFEDIT_region_RAM_end__ = 0x2404FFFF - NONCACHEABLEBUFFER_size;
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define symbol NONCACHEABLEBUFFER_start = __ICFEDIT_region_RAM_end__ + 1;
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define symbol NONCACHEABLEBUFFER_end = __ICFEDIT_region_RAM_end__ + NONCACHEABLEBUFFER_size;
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/*-Sizes-*/
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define symbol __ICFEDIT_size_cstack__ = 0x400;
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define symbol __ICFEDIT_size_heap__ = 0x200;
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/**** End of ICF editor section. ###ICF###*/
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define symbol __region_ITCM_start__ = 0x00000000;
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define symbol __region_ITCM_end__ = 0x0000FFFF;
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define symbol __region_DTCM_start__ = 0x20000000;
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define symbol __region_DTCM_end__ = 0x2000FFFF;
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define symbol __region_SRAMAHB_start__ = 0x30000000;
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define symbol __region_SRAMAHB_end__ = 0x30007FFF;
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define symbol __region_BKPSRAM_start__ = 0x38800000;
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define symbol __region_BKPSRAM_end__ = 0x38800FFF;
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export symbol NONCACHEABLEBUFFER_start;
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export symbol NONCACHEABLEBUFFER_size;
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export symbol __ICFEDIT_region_ROM_start__;
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export symbol __ICFEDIT_region_ROM_end__;
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define memory mem with size = 4G;
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define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
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define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
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define region NONCACHEABLE_region = mem:[from NONCACHEABLEBUFFER_start to NONCACHEABLEBUFFER_end];
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define region ITCM_region = mem:[from __region_ITCM_start__ to __region_ITCM_end__];
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define region DTCM_region = mem:[from __region_DTCM_start__ to __region_DTCM_end__];
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define region SRAMAHB_region = mem:[from __region_SRAMAHB_start__ to __region_SRAMAHB_end__];
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define region BKPSRAM_region = mem:[from __region_BKPSRAM_start__ to __region_BKPSRAM_end__];
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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initialize by copy { readwrite };
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do not initialize { section .noinit };
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place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
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place in ROM_region { readonly };
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place in RAM_region { readwrite };
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place in DTCM_region { block CSTACK, block HEAP };
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place in NONCACHEABLE_region { section noncacheable_buffer };
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