读取外部文件

This commit is contained in:
ranchuan
2024-12-30 19:32:43 +08:00
parent dcb6b4b7ec
commit 067f637ab8
3 changed files with 27 additions and 2 deletions

View File

@@ -5,11 +5,13 @@
module test (
input clk,
input rst,
input [7:0] data,
output dout,
output reg [7:0] data_addr,
// 声明变量 如果不指定变量类型 则默认是wire类型
output reg [31:0] sum
);
reg [31:0] count;
assign dout = ~clk;
@@ -18,9 +20,13 @@ module test (
always @(posedge clk or rst) begin
if(rst==0) begin
sum <= 0;
count <= 0;
data_addr <=0;
end
else begin
sum <= sum+1;
count <= count+1;
sum <= data*2;
data_addr <= count[7:0];
end
end